Search Results - "Asynchronous circuits"

A reconfigurable routing architecture of asynchronous NoC systems.

Authors: Zhao, Kangli Xu, Ziwei Lu, YiHua et al.

Source: International Journal of Electronics. Jun2026, Vol. 113 Issue 6, p1194-1208. 15p.

Computing on semaphores of Dijkstra with place-transition nets.

Authors: Zaitsev, D. A.¹ (AUTHOR) daze@acm.org

Source: International Journal of Parallel, Emergent & Distributed Systems. May2026, Vol. 41 Issue 3, p291-320. 30p.

Subjects: Petri nets, Asynchronous circuits, Recursion theory, Computer multitasking

Statistical Performance Analysis Framework for Bundled‐Data Asynchronous Circuits With Dynamic Voltage Scaling.

Authors: Benyoussef, Maryem Thibeault, Claude Savaria, Yvon et al.

Source: IET Computers & Digital Techniques (Wiley-Blackwell). 3/28/2026, Vol. 2026, p1-17. 17p.

Optimal control of asynchronous sequential machines.

Authors: Hammer, Jacob¹ (AUTHOR) hammer@mst.ufl.edu

Source: International Journal of Control. Mar2026, Vol. 99 Issue 3, p757-782. 26p.

Subjects: Asynchronous circuits, State feedback (Feedback control systems), Optimal control theory, Distributed computing, Conservation of energy, Cost functions, Finite state machines

Self-timed systems for energy-efficient computing.

Authors: Manohar, Rajit¹ (AUTHOR) rajit.manohar@yale.edu

Source: Philosophical Transactions of the Royal Society A: Mathematical, Physical & Engineering Sciences. 2/26/2026, Vol. 384 Issue 2315, p1-10. 10p.

Reaction systems with nondeterministic behaviour.

Authors: Aman, Bogdan Ciobanu, Gabriel

Source: Natural Computing. Sep2025, Vol. 24 Issue 3, p719-730. 12p.

Subjects: Asynchronous circuits, Dynamical systems, Computer simulation, Stochastic systems, Stochastic processes

Asynchronous decentralized traffic signal coordinated control in urban road network.

Authors: Zhu, Jichen Ma, Chengyuan Shi, Yuqi et al.

Source: Computer-Aided Civil & Infrastructure Engineering; 3/10/2025, Vol. 40 Issue 7, p895-916, 22p

Asynchronous Register Less NULL Convention Logic (RL-NCL) Pipeline Architectures Using Basic Gates.

Alternate Title: Arquitecturas Pipeline Asincrónicas Register Less NULL Convention Logic (RL-NCL) Usando Puertas Básicas.
Arquiteturas de Pipeline Assíncronas Register Less NULL Convention Logic (RL-NCL) Usando Portas Básicas.

Authors: Duarte, Gabriel C. Oliveira, Duarte L.

Source: Memoria Investigaciones en Ingeniería. 2022, Issue 23, p75-87. 13p.

Asynchronous interface circuit for nonlinear connectivity in multicore spiking neural networks.

Authors: Kim, Sung‐Eun Oh, Kwang‐Il Kang, Taewook et al.

Source: ETRI Journal; Oct2024, Vol. 46 Issue 5, p878-889, 12p

Stall‐Free Asynchronous State Repartitioning With a Proactive Workload Tracking Window.

Authors: Luiz, Douglas Pereira Mendizabal, Odorico Machado

Source: Concurrency & Computation: Practice & Experience; Feb2026, Vol. 38 Issue 3, p1-22, 22p

TFI-FTS: An efficient transient fault injection and faulttolerant system for asynchronous circuits on FPGA platform.

Authors: Y. N., Sharath Kumar P., Dinesha

Source: International Journal of Electrical & Computer Engineering (2088-8708). Jun2021, Vol. 11 Issue 3, p2705-2711. 7p.

Subjects: Asynchronous circuits, Very large scale circuit integration, Digital electronics, Threshold logic, Logic circuits

Voltage Stacking: A First-Order Modelization of an m × n Asynchronous Array for Chip and Architectural Design Exploration.

Authors: Chauviere, Baudouin Stevens, Kenneth S.

Source: Journal of Low Power Electronics & Applications; Sep2024, Vol. 14 Issue 3, p44, 16p

A Cellular Automaton Approach for Efficient Computing on Surface Chemical Reaction Networks.

Authors: Yu, Sihai Xu, Wenli Lee, Jia et al.

Source: New Generation Computing; Jun2024, Vol. 42 Issue 2, p217-235, 19p

Traffic model based on synchronous and asynchronous exclusion processes.

Authors: Yashina, Marina Tatashev, Alexander

Source: Mathematical Methods in the Applied Sciences. 9/30/2020, Vol. 43 Issue 14, p8136-8146. 11p.

Adaptive Event‐Triggered Asynchronous Filtering for Piecewise Homogenous Markov Jump Systems via Singular Transformation.

Authors: Lin, Ming Liao, Weixiong Wu, Yunfa et al.

Source: International Journal of Robust & Nonlinear Control; Dec2025, Vol. 35 Issue 18, p7779-7790, 12p

基于全地形自动感知的自适应异步控制系统研究. (Chinese)

Authors: 汤劲松 孟祥振 李传虎 et al.

Source: Rolling Stock (1002-7602); Oct2025, Vol. 63 Issue 5, p118-123, 6p

Implementation of Low Power Null Conventional Logic Function for Configuration Logic Block.

Authors: Rajasekar, P. Subash Kumar, C. S.

Source: Wireless Personal Communications. Aug2019, Vol. 107 Issue 4, p2231-2245. 15p.

Subjects: Asynchronous circuits, Field programmable gate arrays

Verification and Validation with Prototype Chip Implemented with Layout Level Scan C-Elements.

Authors: Iwata, Hiroshi Yamasaki, Kokoro Yamaguchi, Ken'ichi

Source: Journal of Electronic Testing. Aug2024, Vol. 40 Issue 4, p497-508. 12p.

Comparative analysis of C-element and D-element double edge triggered flip flop for power efficient VLSI applications.

Authors: Tulasi, Sanath Kumar Inthiyaz, Syed Prasad, G. R. K. et al.

Source: AIP Conference Proceedings. 2024, Vol. 2512 Issue 1, p1-13. 13p.

A Scalable Formal Framework for the Verification and Vulnerability Analysis of Redundancy-Based Error-Resilient Null Convention Logic Asynchronous Circuits.

Authors: Mazumder, Dipayan Datta, Mithun Bodoh, Alexander C. et al.

Source: Journal of Low Power Electronics & Applications; Mar2024, Vol. 14 Issue 1, p5, 24p