Search Results - "CMOS logic circuits"

A Multiplierless Architecture for Image Convolution in Memory.

Authors: Reuben, John Zeller, Felix Seiler, Benjamin et al.

Source: Journal of Low Power Electronics & Applications; Dec2025, Vol. 15 Issue 4, p63, 16p

Cost‐Effective Winner‐Take‐All Approach for Comparing Multi‐Output Neural Networks.

Authors: Abdel-Hafeez, Saleh Abubaker, Samer Patil, Shashikant

Source: IET Circuits, Devices & Systems (Wiley-Blackwell). 5/4/2026, Vol. 2026, p1-9. 9p.

Subjects: CMOS logic circuits, Artificial neural networks, Digital electronics, Scalability, Convolutional neural networks

Non-Fourier thermal analysis of the self-heating effect in CMOS logic circuits.

Authors: Xia, Yonglin Sheng, Yufei Jia, Ru et al.

Source: APL Electronic Devices. Sep2025, Vol. 1 Issue 3, p1-9. 9p.

A High‐Hole Mobility Tellurium Transistor With Electron‐Donating Passivation Layer for Scalable, High‐Throughput Electronics.

Authors: Nam, Taehyun Lee, Seung Min Lee, Chungryeol et al.

Source: Advanced Functional Materials; 6/11/2026, Vol. 36 Issue 47, p1-18, 18p

Circuit-Level Analysis of Spacer Dielectrics in Forksheet FETs for High-Speed Digital Applications.

Authors: Murali Chandra Babu, K. Gadiya, Siddhali Macherla, Swaroop Kumar et al.

Source: Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ). Jun2026, p1-14. 14p.

CMOS 收发器的总剂量效应及行为级仿真研究. (Chinese)

Authors: 白豪杰 彭治钢 李洋 et al.

Source: Atomic Energy Science & Technology; Mar2026, Vol. 60 Issue 3, p759-768, 10p

In‐Memory Binary Vector‐Matrix Multiplication Circuit Design for Triangle Counting Algorithm Acceleration.

Authors: Du, Sichun Dong, Yu Li, Jun et al.

Source: International Journal of Circuit Theory & Applications; Mar2026, Vol. 54 Issue 3, p1350-1362, 13p

Sub-1V, flexible, all-polymer complementary logic circuits based on electrolyte-gated transistors.

Authors: Kim, Su Jung Park, Dong Hyun Lee, Yu Na et al.

Source: NPJ Flexible Electronics; 2/16/2026, Vol. 10 Issue 1, p1-10, 10p

Exploring the Application of Gold‐Assisted Exfoliation in Large‐scale Integration of n‐Type and p‐Type 2D‐FETs.

Authors: Giza, Małgorzata Mukhopadhyay, Krishnendu Ravichandran, Harikrishnan et al.

Source: Small Methods; 2/9/2026, Vol. 10 Issue 3, p1-9, 9p

Complementary Logic Driven by Dielectrophoretic Assembly of 2D Semiconductors.

Authors: Rhee, Dongjoon Song, Okin Park, Ji Yun et al.

Source: Advanced Functional Materials; 2/5/2026, Vol. 36 Issue 11, p1-12, 12p

Logical Reverse Inference Realized by Combined Bits with Backhopping‐Like Current‐Induced Magnetization Switching.

Authors: Ren, Ruizhi Cao, Yi Zuo, Minggao et al.

Source: Advanced Functional Materials; 10/22/2025, Vol. 35 Issue 43, p1-8, 8p

Indium Alloying as a Mobility Booster in IGZO Thin‐Film‐Transistor via Plasma‐Enhanced Atomic Layer Deposition Approach for BEOL Compatible Circuits.

Authors: Zhang, Meishan Shen, Mei Wang, Wenhui et al.

Source: Advanced Electronic Materials; 10/6/2025, Vol. 11 Issue 16, p1-9, 9p

2D MoTe2 CMOS Circuits and Photodiodes by Contact Engineering.

Authors: Li, Weijian Chen, Enzi Li, Dawei et al.

Source: Advanced Materials Technologies; 8/7/2025, Vol. 10 Issue 15, p1-10, 10p

2D MoTe2 CMOS Circuits and Photodiodes by Contact Engineering.

Authors: Li, Weijian Chen, Enzi Li, Dawei et al.

Source: Advanced Materials Technologies. 8/7/2025, Vol. 10 Issue 15, p1-10. 10p.

Design of 8:1 multiplexer using gate diffusion input (GDI) technique and comparison of delay performance with CMOS logic.

Authors: Kumar, B. Sai Dass, P.

Source: AIP Conference Proceedings. 2025, Vol. 3300 Issue 1, p1-9. 9p.

Challenges for Nanoscale CMOS Logic Based on Two-Dimensional Materials.

Authors: Knobloch, Theresia Selberherr, Siegfried Grasser, Tibor

Source: Nanomaterials (2079-4991). Oct2022, Vol. 12 Issue 20, p3548-N.PAG. 19p.

Subjects: CMOS logic circuits, Field-effect transistors, Complementary metal oxide semiconductors, Metal oxide semiconductor field-effect transistors, Semiconductors, Logic, Transistors

An ultra‐low‐power CNFET‐based improved Schmitt trigger design for VLSI sensor applications.

Authors: Vidhyadharan, Abhay Sanjay Vidhyadharan, Sanjay

Source: International Journal of Numerical Modelling. Jul/Aug2021, Vol. 34 Issue 4, p1-12. 12p.

Subjects: CMOS logic circuits, Very large scale circuit integration, Interface circuits, Complementary metal oxide semiconductors, Carbon nanotubes

Design of Memristor-Based Combinational Logic Circuits.

Authors: Liu, Gongzhi Shen, Shuhang Jin, Peipei et al.

Source: Circuits, Systems & Signal Processing. Dec2021, Vol. 40 Issue 12, p5825-5846. 22p.

Subjects: CMOS logic circuits, Combinational circuits, Logic circuits, Computer logic, Video codecs, Memristors

Demonstration of CMOS inverter on poly-crystalline Ge on glass.

Authors: Morimoto, Atsuki Huang, Linyu Igura, Kota et al.

Source: Materials Science in Semiconductor Processing. Jun2026, Vol. 207, pN.PAG-N.PAG. 1p.

Subjects: CMOS logic circuits, Thin film transistors, Semiconductor manufacturing, Crystallization, Very large scale circuit integration, Semiconductor materials, Flexible electronics

Military projects seek to combine biology and machines; what sounds familiar about that?

Authors: Keller, John

Source: Military & Aerospace Electronics. Jan/Feb2025, Vol. 36 Issue 1, p2-2. 1p.