Search Results - "Harkin, Jim"

FPGA Realization of a Novel Hyperchaos Augmented Image Encryption Algorithm.

Authors: Alexan, Wassim Elshabasy, Noura H. Mamdouh, Eyad et al.

Source: IET Computers & Digital Techniques (Wiley-Blackwell); 2/19/2026, Vol. 2026, p1-32, 32p

A Novel Pipeline for Adrenal Gland Segmentation: Integration of a Hybrid Post-Processing Technique with Deep Learning.

Authors: Fayemiwo, Michael Gardiner, Bryan Harkin, Jim et al.

Source: Journal of Imaging Informatics in Medicine; Dec2025, Vol. 38 Issue 6, p3698-3710, 13p

Intelligent User Support in Autonomous Remote Experimentation Environments.

Authors: Callaghan, Michael J. Harkin, Jim McGinnity, Thomas Martin

Source: IEEE Transactions on Industrial Electronics; June 2008, Vol. 55 Issue 6, p2355-2367, 13p

Rapid application prototyping for hardware modular spiking neural network architectures.

Authors: Pande, Sandeep Morgan, Fearghal Krewer, Finn et al.

Source: Neural Computing & Applications; Sep2017, Vol. 28 Issue 9, p2767-2779, 13p

Toward TinyDPFL systems for real-time cardiac healthcare: Trends, challenges, and system-level perspectives on AI algorithms, hardware, and edge intelligence.

Authors: Akram, Muhammad Shakeel Varma, Bogaraju Sharatchandra Javed, Aqib et al.

Source: Journal of Systems Architecture; Nov2025, Vol. 168, pN.PAG-N.PAG, 1p

Predicting Networks-on-Chip traffic congestion with Spiking Neural Networks.

Authors: Javed, Aqib Harkin, Jim McDaid, Liam et al.

Source: Journal of Parallel & Distributed Computing. Aug2021, Vol. 154, p82-93. 12p.

Subjects: Traffic congestion, Network routers, Forecasting, Network performance

An authentication strategy based on spatiotemporal chaos for software copyright protection.

Authors: Lvchen Cao Yuling Luo Jinjie Bi et al.

Source: Security & Communication Networks; Dec2015, Vol. 8 Issue 18, p4073-4086, 14p

Immuno-informatics analysis predicts B and T cell consensus epitopes for designing peptide vaccine against SARS-CoV-2 with 99.82% global population coverage.

Authors: Shukla, Priyank Pandey, Preeti Prasad, Bodhayan et al.

Source: Briefings in Bioinformatics; Jan2022, Vol. 23 Issue 1, p1-15, 15p

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A Reconfigurable and Biologically Inspired Paradigm for Computation Using Network-On-Chip and Spiking Neural Networks.

Authors: Harkin, Jim Morgan, Fearghal McDaid, Liam et al.

Source: International Journal of Reconfigurable Computing; 2009, p1-13, 13p, 1 Color Photograph, 9 Diagrams, 2 Charts, 3 Graphs

An memristor-based synapse implementation using BCM learning rule.

Authors: Huang, Yongchuang Liu, Junxiu Harkin, Jim et al.

Source: Neurocomputing; Jan2021, Vol. 423, p336-342, 7p

On‐chip communication for neuro‐glia networks.

Authors: Martin, George Harkin, Jim McDaid, Liam J. et al.

Source: IET Computers & Digital Techniques (Wiley-Blackwell). Jul2018, Vol. 12 Issue 4, p130-138. 9p.

Counteracting dynamical degradation of a class of digital chaotic systems via Unscented Kalman Filter and perturbation.

Authors: Luo, Yuling Liu, Yunqi Liu, Junxiu et al.

Source: Information Sciences; May2021, Vol. 556, p49-66, 18p

Bio-inspired fault detection circuits based on synapse and spiking neuron models.

Authors: Liu, Junxiu Huang, Yongchuang Luo, Yuling et al.

Source: Neurocomputing; Feb2019, Vol. 331, p473-482, 10p

An Efficient, Low-Cost Routing Architecture for Spiking Neural Network Hardware Implementations.

Authors: Luo, Yuling Wan, Lei Liu, Junxiu et al.

Source: Neural Processing Letters; Dec2018, Vol. 48 Issue 3, p1777-1788, 12p

SPANNER: A Self-Repairing Spiking Neural Network Hardware Architecture.

Authors: Liu, Junxiu Harkin, Jim Maguire, Liam P. et al.

Source: IEEE Transactions on Neural Networks & Learning Systems. Apr2018, Vol. 29 Issue 4, p1287-1300. 14p.

Subjects: Electronic systems, Biomimicry, Astrocytes, Field programmable gate arrays, Hardware, Fault-tolerant control systems

Scalable Networks-on-Chip Interconnected Architecture for Astrocyte-Neuron Networks.

Authors: Liu, Junxiu Harkin, Jim Maguire, Liam P. et al.

Source: IEEE Transactions on Circuits & Systems. Part I: Regular Papers. Dec2016, Vol. 63 Issue 12, p2290-2303. 14p.

Subjects: Astrocytes, Neurons, Mammals, Electronic circuits, Hardware, International communication, Scalability

Low cost fault-tolerant routing algorithm for Networks-on-Chip.

Authors: Liu, Junxiu Harkin, Jim Li, Yuhua et al.

Source: Microprocessors & Microsystems. Aug2015, Vol. 39 Issue 6, p358-372. 15p.

Subjects: Fault-tolerant computing, Routing algorithms, Networks on a chip, Adaptive computing systems, Real-time computing

Fault-Tolerant Networks-on-Chip Routing With Coarse and Fine-Grained Look-Ahead.

Authors: Liu, Junxiu Harkin, Jim Li, Yuhua et al.

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Feb2016, Vol. 35 Issue 2, p260-273. 14p.

Subjects: Fault tolerance (Engineering), Integrated circuit design, Integrated circuits, Manufacturing processes, Routing (Computer network management)

Layered tile architecture for efficient hardware spiking neural networks.

Authors: Wan, Lei Liu, Junxiu Harkin, Jim et al.

Source: Microprocessors & Microsystems; Aug2017, Vol. 53, p21-32, 12p