Search Results - "Huazhong Yang"

A personalized multitasking framework for real-time prediction of blood glucose levels in type 1 diabetes patients.

Authors: Huazhong Yang Wang Li Maojin Tian et al.

Source: Mathematical Biosciences & Engineering. 2024, Vol. 21 Issue 2, p2515-2541. 27p.

High-speed Optical Transceivers: Integrated Circuits Designs And Optical Devices Techniques

Authors: Yuyu Liu Huazhong Yang

Resource Type: eBook.

Subjects: Integrated circuits--Design and construction, Optical communications

Categories: TECHNOLOGY & ENGINEERING / Electrical

High PE Utilization CNN Accelerator with Channel Fusion Supporting Pattern-Compressed Sparse Neural Networks.

Authors: Jingyu Wang Songming Yu Jinshan Yue et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2020, Issue 57, p1460-1465, 6p

INCA: INterruptible CNN Accelerator for Multi-tasking in Embedded Robots.

Authors: Jincheng Yu Zhilin Xu Shulin Zeng et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2020, Issue 57, p1214-1219, 6p

Utilizing Direct Photocurrent Computation and 2D Kernel Scheduling to Improve In-Sensor-Processing Efficiency.

Authors: Han Xu Maimaiti Nazhamaiti Yidong Liu et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2020, Issue 57, p107-112, 6p

A Configurable Multi-Precision CNN Computing Framework Based on Single Bit RRAM.

Authors: Zhenhua Zhu Hanbo Sun Yujun Lin et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2019, Issue 56, p19-24, 6p

A 3T/Cell Practical Embedded Nonvolatile Memory Supporting Symmetric Read and Write Access Based on Ferroelectric FETs.

Authors: Juejian Wu Hongtao Zhong Kai Ni et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2019, Issue 56, p7-12, 6p

Long Live TIME: Improving Lifetime for Training-In-Memory Engines by Structured Gradient Sparsification.

Authors: Yi Cai Yujun Lin Lixue Xia et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2018, Issue 55, p595-600, 6p

Calibrating Process Variation at System Level with In-Situ Low-Precision Transfer Learning for Analog Neural Network Processors.

Authors: Kaige Jia Zheyu Liu Qi Wei et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2018, Issue 55, p193-198, 6p

Alcohol degradation, learning, and memory-enhancing effect of Acetobacter pasteurianus BP2201 in Caenorhabditis elegans model.

Authors: Xin Wen Huazhong Yang Zhongqi Li et al.

Source: Journal of Applied Microbiology. Nov2023, Vol. 134 Issue 11, p1-10. 10p. 1 Diagram, 2 Charts, 4 Graphs.

Design Methodology for Thin-Film Transistor Based Pseudo-CMOS Logic Array with Multi-Layer Interconnect Architecture.

Authors: Qinghang Zhao Yongpan Liu Wenyu Sun et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2017, Issue 54, p939-944, 6p

TIME: A Training-in-memory Architecture for Memristor-based Deep Neural Networks.

Authors: Ming Cheng Lixue Xia Zhenhua Zhu et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2017, Issue 54, p297-302, 6p

A New Adaptive Delay Method for Wideband Wireless Kahn's RF Power Amplifiers.

Authors: Chuande Zhi Huazhong Yang

Source: IEEE Transactions on Consumer Electronics; August 2006, Vol. 52 Issue 3, p962-965, 4p

Could We Realize the Fully Flexible System by Real-Time Computing with Thin-Film Transistors?

Authors: Qin Li Zheyu Liu Fei Qiao et al.

Source: Applied Sciences (2076-3417); Dec2017, Vol. 7 Issue 12, p1224, 14p

Performance-Aware Task Scheduling for Energy Harvesting Nonvolatile Processors Considering Power Switching Overhead.

Authors: Hehe Li Yongpan Liu Chenchen Fu et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; Jun2016, p922-927, 6p

HW/SW Co-design of Nonvolatile IO System in Energy Harvesting Sensor Nodes for Optimal Data Acquisition.

Authors: Zewei Li Yongpan Liu Daming Zhang et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; Jun2016, p910-915, 6p

Switched by Input: Power Efficient Structure for RRAM-based Convolutional Neural Network.

Authors: Lixue Xia Tianqi Tang Wenqin Huangfu et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; Jun2016, p737-742, 6p

Run-Time Technique for Simultaneous Aging and Power Optimization in GPGPUs.

Authors: Xiaoming Chen Yu Wang Yun Liang et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2014, p985-990, 6p

Design Methodologies for 3D Mixed Signal Integrated Circuits: a Practical 12-bit SAR ADC Design Case.

Authors: Wulong Liu Guoqing Chen Xue Han et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2014, p973-978, 6p

Sparse LU Factorization for Parallel Circuit Simulation on GPU.

Authors: Ling Ren Xiaoming Chen Yu Wang et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; Jun2012, p1125-1130, 6p