Search Results - "Performance of distributed shared memory"

A mathematical model to calculate real cost/performance in software distributed shared memory on computing environments.

Authors: Khaneghah, Ehsan Mousavi Shadnoush, Nosratollah Ghobakhlou, Amir Hossein

Source: Journal of Supercomputing. Apr2018, Vol. 74 Issue 4, p1715-1764. 50p.

Subjects: Performance of distributed shared memory, Computer software costs, High performance computing, LINPACK (Computer system), Parallel programming

Sparse LU Factorization for Parallel Circuit Simulation on GPU.

Authors: Ling Ren Xiaoming Chen Yu Wang et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; Jun2012, p1125-1130, 6p

Quantifying Eventual Consistency with PBS.

Authors: Bailis, Peter Venkataraman, Shivaram Franklin, Michael J. et al.

Source: Communications of the ACM; Aug2014, Vol. 57 Issue 8, p93-102, 10p, 2 Diagrams, 1 Chart, 4 Graphs

Symmetric Indefinite Linear Solver Using OpenMP Task on Multicore Architectures.

Authors: Yamazaki, Ichitaro Kurzak, Jakub Wu, Panruo et al.

Source: IEEE Transactions on Parallel & Distributed Systems; Aug2018, Vol. 29 Issue 8, p1879-1892, 14p

Large Objects and Iterator Blocks.

Authors: Buontempo, Frances, frances.buontempo@gmail.com

Source: Overload; Aug2012, Issue 110, p22-24, 3p

Two Hardware-Based Approaches for Deterministic Multiprocessor Replay.

Authors: Hower, Derek R. Montesinos, Pablo Ceze, Luis

Source: Communications of the ACM; June 2009, Vol. 52 Issue 6, p93-100, 8p

Contention resolution on a broadcast-based distributed shared memory multiprocessor.

Authors: Akay, M. F. Katsinis, C.

Source: IET Computers & Digital Techniques; January 2008, Vol. 2 Issue 1, p45-55, 11p

A correctness condition for high-performance multiprocessors.

Authors: Attiya, Hagit Friedman, Roy

Source: SIAM Journal on Computing; December 1998, Vol. 27 Issue 6, p1637-1670, 34p

An Improved DSM System Design and Implementation.

Authors: Ramesh, T. Sudhakar, Chapram

Source: International Journal of Next-Generation Computing; Nov2012, Vol. 3 Issue 3, p312-327, 16p

RANDOMIZED SELF-STABILIZING LEADER ELECTION IN PREFERENCE-BASED ANONYMOUS TREES.

Authors: FAJARDO-DELGADO, DANIEL FERNÁNDEZ-ZEPEDA, JOSÉ ALBERTO BOURGEOIS, ANU G. et al.

Source: International Journal of Foundations of Computer Science; Jun2012, Vol. 23 Issue 4, p853-875, 23p

Chapter 2: History, trends, and performance tradeo: Fundamental Performance Tradeo.

Authors: Abadi, Daniel Boncz, Peter Harizopoulos, Stavros et al.

Source: Foundations & Trends in Databases; 2012, Vol. 5 Issue 3, p213-215, 3p

SARC coherence: scaling directory cache coherence in performance and power.

Authors: Kaxiras, Stefanos Keramidas, Georgios

Source: IEEE Micro; September/October 2010, Vol. 30 Issue 5, p54-65, 12p

DMP: Deterministic Shared-Memory Multiprocessing.

Authors: Devietti, Joseph Lucia, Brandon Ceze, Luis

Source: IEEE Micro; January/February 2010, Vol. 30 Issue 1, p40-49, 10p

A Fast Hierarchical Arbitration Scheme for Multi-Tb/s Packet Switches with Shared Memory Switching.

Authors: Popa, Daniel Post, Georg Noirie, Ludovic

Source: Bell Labs Technical Journal; Summer2009, Vol. 14 Issue 2, p81-95, 15p

The Design of a Multicore Extension of the SPIN Model Checker.

Authors: Holzmann, Gerard J. Bosnacki, Dragan

Source: IEEE Transactions on Software Engineering; October 2007, Vol. 33 Issue 10, p659-674, 16p

Efficient self-tuning spin-locks using competitive analysis.

Authors: Ha, Phuong Hoai Papatriantafilou, Marina Tsigas, Philippas

Source: Journal of Systems & Software; July 2007, Vol. 80 Issue 7, p1077-1090, 14p

Transactional Memory: An Overview.

Authors: Harris, Tim Cristal, Adrián Ayguade, Eduard

Source: IEEE Micro; May/June 2007, Vol. 27 Issue 3, p8-29, 22p

Performance Evaluation of the Cray X1 Distributed Shared-Memory Architecture.

Authors: Dunigan, Thomas H. Jr

Source: IEEE Micro; January/February 2005, Vol. 25 Issue 1, p30-40, 11p

Parallel Program Performance Prediction Using Deterministic Task Graph Analysis.

Authors: Adve, Vikram S. Vernon, Mary K.

Source: ACM Transactions on Computer Systems; Feb2004, Vol. 22 Issue 1, p94-136, 43p

Performance-steered design of software architectures for embedded multicore systems.

Authors: Bechini, Alessio Prete, Cosimo Antonio

Source: Software: Practice & Experience; October 2002, Vol. 32 Issue 12, p1155-1173, 19p