Lee, D., Kolan, T., Morgenshtein, A., Sokhin, V., Mrad, R., Ziv, A., & Bertacco, V. (2016). Probabilistic Bug-Masking Analysis for Post-Silicon Tests in Microprocessor Verification. DAC: Annual ACM/IEEE Design Automation Conference, 138. https://doi.org/10.1145/2897937.2898072
Chicago Style (17th ed.) CitationLee, Doowon, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Mrad, Avi Ziv, and Valeria Bertacco. "Probabilistic Bug-Masking Analysis for Post-Silicon Tests in Microprocessor Verification." DAC: Annual ACM/IEEE Design Automation Conference 2016: 138. https://doi.org/10.1145/2897937.2898072.
MLA (9th ed.) CitationLee, Doowon, et al. "Probabilistic Bug-Masking Analysis for Post-Silicon Tests in Microprocessor Verification." DAC: Annual ACM/IEEE Design Automation Conference, 2016, p. 138, https://doi.org/10.1145/2897937.2898072.