Probabilistic Bug-Masking Analysis for Post-Silicon Tests in Microprocessor Verification.
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| Title: | Probabilistic Bug-Masking Analysis for Post-Silicon Tests in Microprocessor Verification. |
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| Authors: | Doowon Lee1, doowon@umich.edu, Kolan, Tom2, valeria@umich.edu, Morgenshtein, Arkadiy2, tomk@il.ibm.com, Sokhin, Vitali2, arkadiym@il.ibm.com, Mrad, Ronny2, vitali@il.ibm.com, Ziv, Avi2, morad@il.ibm.com, Bertacco, Valeria1, aziv@il.ibm.com |
| Source: | DAC: Annual ACM/IEEE Design Automation Conference; Jun2016, p138-143, 6p |
| Database: | Applied Science & Technology Source |
| ISSN: | 0738100X |
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| DOI: | 10.1145/2897937.2898072 |
