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A new design and implementation of hardware accelerator for line detection.

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Bibliographic Details
Title: A new design and implementation of hardware accelerator for line detection.
Authors: Chen, Ching-Han1, Guo, Min-Hao1, Luoh, Leh2
Source: Microprocessors & Microsystems; Sep2018, Vol. 61, p179-197, 19p
Database: Applied Science & Technology Source
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  Availability: 0
Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 130720508
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
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  Data: A new design and implementation of hardware accelerator for line detection.
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PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=130720508
RecordInfo BibRecord:
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      – Type: doi
        Value: 10.1016/j.micpro.2018.05.013
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      – Code: eng
        Text: English
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      Pagination:
        PageCount: 19
        StartPage: 179
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      – TitleFull: A new design and implementation of hardware accelerator for line detection.
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            NameFull: Chen, Ching-Han
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            NameFull: Guo, Min-Hao
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            NameFull: Luoh, Leh
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          Dates:
            – D: 01
              M: 09
              Text: Sep2018
              Type: published
              Y: 2018
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              Value: 61
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