Thermal-Aware Shallow Trench Isolation Design Optimization for Minimizing ${I}_{OFF}$ in Various Sub-10-nm 3-D Transistors.

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Bibliographic Details
Title: Thermal-Aware Shallow Trench Isolation Design Optimization for Minimizing ${I}_{OFF}$ in Various Sub-10-nm 3-D Transistors.
Authors: Myeong, Ilho1, Son, Dokyun1, Kim, Hyunsuk1, Kang, Myounggon2, Jeon, Jongwook3, Shin, Hyungcheol1, hcshin@snu.ac.kr
Source: IEEE Transactions on Electron Devices; Jan2019, Vol. 66 Issue 1, p647-654, 8p
Database: Applied Science & Technology Source
Description
ISSN:00189383
DOI:10.1109/TED.2018.2882577