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Thermal-Aware Shallow Trench Isolation Design Optimization for Minimizing ${I}_{OFF}$ in Various Sub-10-nm 3-D Transistors.

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Title: Thermal-Aware Shallow Trench Isolation Design Optimization for Minimizing ${I}_{OFF}$ in Various Sub-10-nm 3-D Transistors.
Authors: Myeong, Ilho1, Son, Dokyun1, Kim, Hyunsuk1, Kang, Myounggon2, Jeon, Jongwook3, Shin, Hyungcheol1, hcshin@snu.ac.kr
Source: IEEE Transactions on Electron Devices; Jan2019, Vol. 66 Issue 1, p647-654, 8p
Database: Applied Science & Technology Source
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  Data: Thermal-Aware Shallow Trench Isolation Design Optimization for Minimizing ${I}_{OFF}$ in Various Sub-10-nm 3-D Transistors.
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  Data: <searchLink fieldCode="AU" term="%22Myeong%2C+Ilho%22">Myeong, Ilho</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Son%2C+Dokyun%22">Son, Dokyun</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Kim%2C+Hyunsuk%22">Kim, Hyunsuk</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Kang%2C+Myounggon%22">Kang, Myounggon</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AU" term="%22Jeon%2C+Jongwook%22">Jeon, Jongwook</searchLink><relatesTo>3</relatesTo><br /><searchLink fieldCode="AU" term="%22Shin%2C+Hyungcheol%22">Shin, Hyungcheol</searchLink><relatesTo>1</relatesTo>, <i>hcshin@snu.ac.kr</i>
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  Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Electron+Devices%22">IEEE Transactions on Electron Devices</searchLink>; Jan2019, Vol. 66 Issue 1, p647-654, 8p
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=137215186
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        Value: 10.1109/TED.2018.2882577
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        Text: English
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      – TitleFull: Thermal-Aware Shallow Trench Isolation Design Optimization for Minimizing ${I}_{OFF}$ in Various Sub-10-nm 3-D Transistors.
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              Text: Jan2019
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