APA (7th ed.) Citation

Liang, Z., Lv, D., Cui, C., Chen, H., He, W., Sheng, W., . . . He, G. (2021). A 3.85-Gb/s 8 × 8 Soft-Output MIMO Detector With Lattice-Reduction-Aided Channel Preprocessing. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 29(2), 307. https://doi.org/10.1109/TVLSI.2020.3036822

Chicago Style (17th ed.) Citation

Liang, Zhuojun, Dongxu Lv, Chao Cui, Hai-Bao Chen, Weifeng He, Weiguang Sheng, Naifeng Jing, Zhigang Mao, and Guanghui He. "A 3.85-Gb/s 8 × 8 Soft-Output MIMO Detector With Lattice-Reduction-Aided Channel Preprocessing." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29, no. 2 (2021): 307. https://doi.org/10.1109/TVLSI.2020.3036822.

MLA (9th ed.) Citation

Liang, Zhuojun, et al. "A 3.85-Gb/s 8 × 8 Soft-Output MIMO Detector With Lattice-Reduction-Aided Channel Preprocessing." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 2, 2021, p. 307, https://doi.org/10.1109/TVLSI.2020.3036822.