Fundamental Data Seperator using Threshold Logic at Low-Supply Voltages.
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| Title: | Fundamental Data Seperator using Threshold Logic at Low-Supply Voltages. |
|---|---|
| Authors: | Hugh, Q.1, Hugh.q@upb.edu, Soria, Freddy1, soria.fred@upb.edu, Kingdon, C. C.1, kingdon.cc@upb.edu, Luedke, Robert G.1, robert.g.lu@upb.edu |
| Source: | Journal of VLSI Circuits & Systems (JVCS); 2022, Vol. 4 Issue 2, p30-37, 8p |
| Database: | Applied Science & Technology Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: aci DbLabel: Applied Science & Technology Source An: 160109248 AccessLevel: 2 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Fundamental Data Seperator using Threshold Logic at Low-Supply Voltages. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AU" term="%22Hugh%2C+Q%2E%22">Hugh, Q.</searchLink><relatesTo>1</relatesTo>, <i>Hugh.q@upb.edu</i><br /><searchLink fieldCode="AU" term="%22Soria%2C+Freddy%22">Soria, Freddy</searchLink><relatesTo>1</relatesTo>, <i>soria.fred@upb.edu</i><br /><searchLink fieldCode="AU" term="%22Kingdon%2C+C%2E+C%2E%22">Kingdon, C. C.</searchLink><relatesTo>1</relatesTo>, <i>kingdon.cc@upb.edu</i><br /><searchLink fieldCode="AU" term="%22Luedke%2C+Robert+G%2E%22">Luedke, Robert G.</searchLink><relatesTo>1</relatesTo>, <i>robert.g.lu@upb.edu</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Journal+of+VLSI+Circuits+%26+Systems+%28JVCS%29%22">Journal of VLSI Circuits & Systems (JVCS)</searchLink>; 2022, Vol. 4 Issue 2, p30-37, 8p |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=160109248 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.31838/jvcs/04.02.05 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 8 StartPage: 30 Titles: – TitleFull: Fundamental Data Seperator using Threshold Logic at Low-Supply Voltages. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Hugh, Q. – PersonEntity: Name: NameFull: Soria, Freddy – PersonEntity: Name: NameFull: Kingdon, C. C. – PersonEntity: Name: NameFull: Luedke, Robert G. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 07 Text: 2022 Type: published Y: 2022 Identifiers: – Type: issn-print Value: 25821458 Numbering: – Type: volume Value: 4 – Type: issue Value: 2 Titles: – TitleFull: Journal of VLSI Circuits & Systems (JVCS) Type: main |
| ResultId | 1 |