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Designing hardware for a robust high-speed cryptographic key generator based on multiple chaotic systems and its FPGA implementation for real-time video encryption.

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Title: Designing hardware for a robust high-speed cryptographic key generator based on multiple chaotic systems and its FPGA implementation for real-time video encryption.
Authors: İnce, Esra1, Karakaya, Barış1, bkarakaya@firat.edu.tr, Türk, Mustafa1
Source: Multimedia Tools & Applications; Jul2024, Vol. 83 Issue 24, p64499-64532, 34p
Database: Applied Science & Technology Source
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An: 178996647
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  Data: Designing hardware for a robust high-speed cryptographic key generator based on multiple chaotic systems and its FPGA implementation for real-time video encryption.
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RecordInfo BibRecord:
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      – Type: doi
        Value: 10.1007/s11042-023-17972-5
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      – Code: eng
        Text: English
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        PageCount: 34
        StartPage: 64499
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      – TitleFull: Designing hardware for a robust high-speed cryptographic key generator based on multiple chaotic systems and its FPGA implementation for real-time video encryption.
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            NameFull: İnce, Esra
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            NameFull: Karakaya, Barış
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            NameFull: Türk, Mustafa
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            – D: 21
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              Text: Jul2024
              Type: published
              Y: 2024
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              Value: 83
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              Value: 24
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