Designing hardware for a robust high-speed cryptographic key generator based on multiple chaotic systems and its FPGA implementation for real-time video encryption.
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| Title: | Designing hardware for a robust high-speed cryptographic key generator based on multiple chaotic systems and its FPGA implementation for real-time video encryption. |
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| Authors: | İnce, Esra1, Karakaya, Barış1, bkarakaya@firat.edu.tr, Türk, Mustafa1 |
| Source: | Multimedia Tools & Applications; Jul2024, Vol. 83 Issue 24, p64499-64532, 34p |
| Database: | Applied Science & Technology Source |
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