Simulation of semiconductor wafer dicing induced faults on chips and their application as augmentation method for a deep learning based visual inspection system.

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Title: Simulation of semiconductor wafer dicing induced faults on chips and their application as augmentation method for a deep learning based visual inspection system.
Authors: Friedrich, Michael1, michael.friedrich@cs.tu-chemnitz.de, Schlosser, Tobias1, tobias.schlosser@cs.tu-chemnitz.de, Kowerko, Danny1, danny.kowerko@cs.tu-chemnitz.de
Source: Journal of Intelligent Manufacturing; Feb2026, Vol. 37 Issue 2, p573-596, 24p
Database: Applied Science & Technology Source
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An: 191453172
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  Data: Simulation of semiconductor wafer dicing induced faults on chips and their application as augmentation method for a deep learning based visual inspection system.
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  Data: <searchLink fieldCode="AU" term="%22Friedrich%2C+Michael%22">Friedrich, Michael</searchLink><relatesTo>1</relatesTo>, <i>michael.friedrich@cs.tu-chemnitz.de</i><br /><searchLink fieldCode="AU" term="%22Schlosser%2C+Tobias%22">Schlosser, Tobias</searchLink><relatesTo>1</relatesTo>, <i>tobias.schlosser@cs.tu-chemnitz.de</i><br /><searchLink fieldCode="AU" term="%22Kowerko%2C+Danny%22">Kowerko, Danny</searchLink><relatesTo>1</relatesTo>, <i>danny.kowerko@cs.tu-chemnitz.de</i>
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  Data: <searchLink fieldCode="JN" term="%22Journal+of+Intelligent+Manufacturing%22">Journal of Intelligent Manufacturing</searchLink>; Feb2026, Vol. 37 Issue 2, p573-596, 24p
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      – Type: doi
        Value: 10.1007/s10845-024-02559-0
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      – Code: eng
        Text: English
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        PageCount: 24
        StartPage: 573
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      – TitleFull: Simulation of semiconductor wafer dicing induced faults on chips and their application as augmentation method for a deep learning based visual inspection system.
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            NameFull: Friedrich, Michael
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            NameFull: Schlosser, Tobias
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              Text: Feb2026
              Type: published
              Y: 2026
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