Implementation of Energy and EDP Efficient Adder Circuits at Sub Threshold Regime for Signal Processing Applications.
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| Title: | Implementation of Energy and EDP Efficient Adder Circuits at Sub Threshold Regime for Signal Processing Applications. |
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| Authors: | PAMULETI, CHALLA1, DAULA, S. M. SHAMSHEER2, GUNDALA, SRINIVASULU3, srinivasulugundala46@gmail.com, MADHURI, K.4, KUMAR, P. M. ASHOK5 |
| Source: | Journal of Active & Passive Electronic Devices; 2026, Vol. 20 Issue 2, p159-173, 15p |
| Database: | Applied Science & Technology Source |
| ISSN: | 15550281 |
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