Hierarchical Memory-Constrained Operator Scheduling of Neural Architecture Search Networks.
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| Title: | Hierarchical Memory-Constrained Operator Scheduling of Neural Architecture Search Networks. |
|---|---|
| Authors: | Wang, Zihan1, wangzh99@sjtu.edu.cn, Lin, Ziyi2, cengfeng.lzy@alibaba-inc.com, Wan, Chengcheng3, cwan@uchicago.edu, Jiang, He4, jianghe@dlut.edu.cn, Chen, Yuting1, chenyt@sjtu.edu.cn, Qiao, Lei5, fly2moon@163.com |
| Source: | DAC: Annual ACM/IEEE Design Automation Conference; 2022, Issue 59, p493-498, 6p |
| Database: | Applied Science & Technology Source |
| FullText | Links: – Type: pdflink Text: Availability: 0 |
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| Header | DbId: aci DbLabel: Applied Science & Technology Source An: 193907153 AccessLevel: 2 PubType: Conference PubTypeId: conference PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Hierarchical Memory-Constrained Operator Scheduling of Neural Architecture Search Networks. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AU" term="%22Wang%2C+Zihan%22">Wang, Zihan</searchLink><relatesTo>1</relatesTo>, <i>wangzh99@sjtu.edu.cn</i><br /><searchLink fieldCode="AU" term="%22Lin%2C+Ziyi%22">Lin, Ziyi</searchLink><relatesTo>2</relatesTo>, <i>cengfeng.lzy@alibaba-inc.com</i><br /><searchLink fieldCode="AU" term="%22Wan%2C+Chengcheng%22">Wan, Chengcheng</searchLink><relatesTo>3</relatesTo>, <i>cwan@uchicago.edu</i><br /><searchLink fieldCode="AU" term="%22Jiang%2C+He%22">Jiang, He</searchLink><relatesTo>4</relatesTo>, <i>jianghe@dlut.edu.cn</i><br /><searchLink fieldCode="AU" term="%22Chen%2C+Yuting%22">Chen, Yuting</searchLink><relatesTo>1</relatesTo>, <i>chenyt@sjtu.edu.cn</i><br /><searchLink fieldCode="AU" term="%22Qiao%2C+Lei%22">Qiao, Lei</searchLink><relatesTo>5</relatesTo>, <i>fly2moon@163.com</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22DAC%3A+Annual+ACM%2FIEEE+Design+Automation+Conference%22">DAC: Annual ACM/IEEE Design Automation Conference</searchLink>; 2022, Issue 59, p493-498, 6p |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=193907153 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1145/3489517.3530472 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 6 StartPage: 493 Titles: – TitleFull: Hierarchical Memory-Constrained Operator Scheduling of Neural Architecture Search Networks. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Wang, Zihan – PersonEntity: Name: NameFull: Lin, Ziyi – PersonEntity: Name: NameFull: Wan, Chengcheng – PersonEntity: Name: NameFull: Jiang, He – PersonEntity: Name: NameFull: Chen, Yuting – PersonEntity: Name: NameFull: Qiao, Lei IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 01 Text: 2022 Type: published Y: 2022 Identifiers: – Type: issn-print Value: 0738100X Numbering: – Type: issue Value: 59 Titles: – TitleFull: DAC: Annual ACM/IEEE Design Automation Conference Type: main |
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