APA (7th ed.) Citation

Balkan, A. O., Qu, G., & Vishkin, U. (2008). An Area-Efficient High-Throughput Hybrid Interconnection Network for Single-Chip Parallel Processing. DAC: Annual ACM/IEEE Design Automation Conference, 435.

Chicago Style (17th ed.) Citation

Balkan, Aydin O., Gang Qu, and Uzi Vishkin. "An Area-Efficient High-Throughput Hybrid Interconnection Network for Single-Chip Parallel Processing." DAC: Annual ACM/IEEE Design Automation Conference 2008: 435.

MLA (9th ed.) Citation

Balkan, Aydin O., et al. "An Area-Efficient High-Throughput Hybrid Interconnection Network for Single-Chip Parallel Processing." DAC: Annual ACM/IEEE Design Automation Conference, 2008, p. 435.