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Scalable FPGA-based Architecture for DCT Computation Using Dynamic Partial Reconfiguration.

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Title: Scalable FPGA-based Architecture for DCT Computation Using Dynamic Partial Reconfiguration.
Authors: HUANG, JIAN1, jnhuang@eecs.ucf.edu, PARRIS, MATTHEW1, LEE, JOOHEUNG1, DEMARA, RONALD F.1
Source: ACM Transactions on Embedded Computing Systems; Oct2009, Vol. 9 Issue 1, p9-9:18, 18p, 6 Diagrams, 4 Charts, 8 Graphs
Database: Applied Science & Technology Source
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DbLabel: Applied Science & Technology Source
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  Data: <searchLink fieldCode="JN" term="%22ACM+Transactions+on+Embedded+Computing+Systems%22">ACM Transactions on Embedded Computing Systems</searchLink>; Oct2009, Vol. 9 Issue 1, p9-9:18, 18p, 6 Diagrams, 4 Charts, 8 Graphs
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        Value: 10.1145/1596532.1596541
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        Text: English
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