Scalable FPGA-based Architecture for DCT Computation Using Dynamic Partial Reconfiguration.
Saved in:
| Title: | Scalable FPGA-based Architecture for DCT Computation Using Dynamic Partial Reconfiguration. |
|---|---|
| Authors: | HUANG, JIAN1, jnhuang@eecs.ucf.edu, PARRIS, MATTHEW1, LEE, JOOHEUNG1, DEMARA, RONALD F.1 |
| Source: | ACM Transactions on Embedded Computing Systems; Oct2009, Vol. 9 Issue 1, p9-9:18, 18p, 6 Diagrams, 4 Charts, 8 Graphs |
| Database: | Applied Science & Technology Source |
Be the first to leave a comment!
