APA (7th ed.) Citation

Givargis, T. D., Vahid, F., & Henkel, J. (2001). Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 9(4), 500. https://doi.org/10.1109/92.931227

Chicago Style (17th ed.) Citation

Givargis, Tony D., Frank Vahid, and Jörg Henkel. "Evaluating Power Consumption of Parameterized Cache and Bus Architectures in System-on-a-chip Designs." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9, no. 4 (2001): 500. https://doi.org/10.1109/92.931227.

MLA (9th ed.) Citation

Givargis, Tony D., et al. "Evaluating Power Consumption of Parameterized Cache and Bus Architectures in System-on-a-chip Designs." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 9, no. 4, 2001, p. 500, https://doi.org/10.1109/92.931227.