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Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs.

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Bibliographic Details
Title: Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs.
Authors: Givargis, Tony D., Vahid, Frank, Henkel, Jörg
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; August 2001, Vol. 9 Issue 4, p500-508, 9p
Database: Applied Science & Technology Source
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