APA (7th ed.) Citation

Givargis, T., Vahid, F., & Henkel, J. (2002). System-Level Exploration for Pareto-Optimal Configurations in Parameterized System-on-a-Chip (December 2002). IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 10(4), 416. https://doi.org/10.1109/TVLSI.2002.807764

Chicago Style (17th ed.) Citation

Givargis, Tony, Frank Vahid, and Jörg Henkel. "System-Level Exploration for Pareto-Optimal Configurations in Parameterized System-on-a-Chip (December 2002)." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 10, no. 4 (2002): 416. https://doi.org/10.1109/TVLSI.2002.807764.

MLA (9th ed.) Citation

Givargis, Tony, et al. "System-Level Exploration for Pareto-Optimal Configurations in Parameterized System-on-a-Chip (December 2002)." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 10, no. 4, 2002, p. 416, https://doi.org/10.1109/TVLSI.2002.807764.