Felicijan, T., & Furber, S. B. (2003). An Asynchronous Ternary Logic Signaling System. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 11(6), 1114. https://doi.org/10.1109/TVLSI.2003.819571
Chicago Style (17th ed.) CitationFelicijan, Tomaz, and Steve B. Furber. "An Asynchronous Ternary Logic Signaling System." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11, no. 6 (2003): 1114. https://doi.org/10.1109/TVLSI.2003.819571.
MLA (9th ed.) CitationFelicijan, Tomaz, and Steve B. Furber. "An Asynchronous Ternary Logic Signaling System." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 11, no. 6, 2003, p. 1114, https://doi.org/10.1109/TVLSI.2003.819571.
Warning: These citations may not always be 100% accurate.