Givargis, T., Vahid, F., & Henkel, J. (2002). Instruction-Based System-Level Power Evaluation of System-on-a-Chip Peripheral Cores. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 10(6), 856. https://doi.org/10.1109/TVLSI.2002.808443
Chicago Style (17th ed.) CitationGivargis, Tony, Frank Vahid, and Jörg Henkel. "Instruction-Based System-Level Power Evaluation of System-on-a-Chip Peripheral Cores." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 10, no. 6 (2002): 856. https://doi.org/10.1109/TVLSI.2002.808443.
MLA (9th ed.) CitationGivargis, Tony, et al. "Instruction-Based System-Level Power Evaluation of System-on-a-Chip Peripheral Cores." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 10, no. 6, 2002, p. 856, https://doi.org/10.1109/TVLSI.2002.808443.