APA (7th ed.) Citation

Kim, N. S., Blaauw, D., & Mudge, T. (2005). Quantitative Analysis and Optimization Techniques for On-Chip Cache Leakage Power. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 13(10), 1147. https://doi.org/10.1109/TVLSI.2005.859476

Chicago Style (17th ed.) Citation

Kim, Nam Sung, David Blaauw, and Trevor Mudge. "Quantitative Analysis and Optimization Techniques for On-Chip Cache Leakage Power." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13, no. 10 (2005): 1147. https://doi.org/10.1109/TVLSI.2005.859476.

MLA (9th ed.) Citation

Kim, Nam Sung, et al. "Quantitative Analysis and Optimization Techniques for On-Chip Cache Leakage Power." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 13, no. 10, 2005, p. 1147, https://doi.org/10.1109/TVLSI.2005.859476.