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Low-Latency Pipelined 2D and 3D CORDIC Processors.

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Bibliographic Details
Title: Low-Latency Pipelined 2D and 3D CORDIC Processors.
Authors: Antelo, Elisardo, Villalba, Julio, Zapata, Emilio L.
Source: IEEE Transactions on Computers; March 2008, Vol. 57 Issue 3, p404-417, 14p
Database: Applied Science & Technology Source
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Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 501221490
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
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  Data: Low-Latency Pipelined 2D and 3D CORDIC Processors.
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  Data: <searchLink fieldCode="AU" term="%22Antelo%2C+Elisardo%22">Antelo, Elisardo</searchLink><br /><searchLink fieldCode="AU" term="%22Villalba%2C+Julio%22">Villalba, Julio</searchLink><br /><searchLink fieldCode="AU" term="%22Zapata%2C+Emilio+L%2E%22">Zapata, Emilio L.</searchLink>
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      – Type: doi
        Value: 10.1109/TC.2007.70796
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      – Code: eng
        Text: English
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        PageCount: 14
        StartPage: 404
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      – TitleFull: Low-Latency Pipelined 2D and 3D CORDIC Processors.
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            NameFull: Antelo, Elisardo
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            NameFull: Villalba, Julio
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            NameFull: Zapata, Emilio L.
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              Text: March 2008
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              Y: 2008
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              Value: 57
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