Bhadra, J., Abadir, M. S., & Burgess, D. (2006). Bottom-up approach in automated embedded memory model generation for high-performance microprocessors. IEE Proceedings -- Computers & Digital Techniques, 153(5), 302. https://doi.org/10.1049/ip-cdt:20050204
Chicago Style (17th ed.) CitationBhadra, J., M. S. Abadir, and D. Burgess. "Bottom-up Approach in Automated Embedded Memory Model Generation for High-performance Microprocessors." IEE Proceedings -- Computers & Digital Techniques 153, no. 5 (2006): 302. https://doi.org/10.1049/ip-cdt:20050204.
MLA (9th ed.) CitationBhadra, J., et al. "Bottom-up Approach in Automated Embedded Memory Model Generation for High-performance Microprocessors." IEE Proceedings -- Computers & Digital Techniques, vol. 153, no. 5, 2006, p. 302, https://doi.org/10.1049/ip-cdt:20050204.