Pomeranz, I., & Reddy, S. M. (2009). Double-Single Stuck-at Faults: A Delay Fault Model for Synchronous Sequential Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, 28(3), 426. https://doi.org/10.1109/TCAD.2009.2013281
Chicago Style (17th ed.) CitationPomeranz, Irith, and Sudhakar M. Reddy. "Double-Single Stuck-at Faults: A Delay Fault Model for Synchronous Sequential Circuits." IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems 28, no. 3 (2009): 426. https://doi.org/10.1109/TCAD.2009.2013281.
MLA (9th ed.) CitationPomeranz, Irith, and Sudhakar M. Reddy. "Double-Single Stuck-at Faults: A Delay Fault Model for Synchronous Sequential Circuits." IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, vol. 28, no. 3, 2009, p. 426, https://doi.org/10.1109/TCAD.2009.2013281.