Low error fixed-width two's complement squarer design using Booth-folding technique.
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| Title: | Low error fixed-width two's complement squarer design using Booth-folding technique. |
|---|---|
| Authors: | Cho, K.-J., Chung, J.-G. |
| Source: | IET Computers & Digital Techniques; July 2007, Vol. 1 Issue 4, p414-422, 9p |
| Database: | Applied Science & Technology Source |
| FullText | Links: – Type: pdflink Text: Availability: 0 |
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| Header | DbId: aci DbLabel: Applied Science & Technology Source An: 501453365 AccessLevel: 2 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=501453365 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1049/iet-cdt:20060033 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 9 StartPage: 414 Titles: – TitleFull: Low error fixed-width two's complement squarer design using Booth-folding technique. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Cho, K.-J. – PersonEntity: Name: NameFull: Chung, J.-G. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 07 Text: July 2007 Type: published Y: 2007 Identifiers: – Type: issn-print Value: 17518601 Numbering: – Type: volume Value: 1 – Type: issue Value: 4 Titles: – TitleFull: IET Computers & Digital Techniques Type: main |
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