View in EDS

Mesh-of-Trees and, Alternative Interconnection Networks for Single-Chip Parallelism.

Saved in:
Bibliographic Details
Title: Mesh-of-Trees and, Alternative Interconnection Networks for Single-Chip Parallelism.
Authors: Balkan, Aydin O., Qu, Gang, Vishkin, Uzi
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; October 2009, Vol. 17 Issue 10, p1419-1432, 14p
Database: Applied Science & Technology Source
FullText Text:
  Availability: 0
Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 501502677
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
IllustrationInfo
Items – Name: Title
  Label: Title
  Group: Ti
  Data: Mesh-of-Trees and, Alternative Interconnection Networks for Single-Chip Parallelism.
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AU" term="%22Balkan%2C+Aydin+O%2E%22">Balkan, Aydin O.</searchLink><br /><searchLink fieldCode="AU" term="%22Qu%2C+Gang%22">Qu, Gang</searchLink><br /><searchLink fieldCode="AU" term="%22Vishkin%2C+Uzi%22">Vishkin, Uzi</searchLink>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Very+Large+Scale+Integration+%28VLSI%29+Systems%22">IEEE Transactions on Very Large Scale Integration (VLSI) Systems</searchLink>; October 2009, Vol. 17 Issue 10, p1419-1432, 14p
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=501502677
RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1109/TVLSI.2008.2003999
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 14
        StartPage: 1419
    Titles:
      – TitleFull: Mesh-of-Trees and, Alternative Interconnection Networks for Single-Chip Parallelism.
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Balkan, Aydin O.
      – PersonEntity:
          Name:
            NameFull: Qu, Gang
      – PersonEntity:
          Name:
            NameFull: Vishkin, Uzi
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 10
              Text: October 2009
              Type: published
              Y: 2009
          Identifiers:
            – Type: issn-print
              Value: 10638210
          Numbering:
            – Type: volume
              Value: 17
            – Type: issue
              Value: 10
          Titles:
            – TitleFull: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
              Type: main
ResultId 1