Pomeranz, I., & Reddy, S. M. (2010). Path Selection for Transition Path Delay Faults. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 18(3), 401. https://doi.org/10.1109/TVLSI.2008.2011913
Chicago Style (17th ed.) CitationPomeranz, Irith, and Sudhakar M. Reddy. "Path Selection for Transition Path Delay Faults." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18, no. 3 (2010): 401. https://doi.org/10.1109/TVLSI.2008.2011913.
MLA (9th ed.) CitationPomeranz, Irith, and Sudhakar M. Reddy. "Path Selection for Transition Path Delay Faults." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 18, no. 3, 2010, p. 401, https://doi.org/10.1109/TVLSI.2008.2011913.
Warning: These citations may not always be 100% accurate.