MetaWire: using FPGA configuration circuitry to emulate a network-on-chip.
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| Title: | MetaWire: using FPGA configuration circuitry to emulate a network-on-chip. |
|---|---|
| Authors: | Shelburne, M., Patterson, C., Athanas, P. |
| Source: | IET Computers & Digital Techniques; May 2010, Vol. 4 Issue 3, p159-169, 11p |
| Database: | Applied Science & Technology Source |
| FullText | Links: – Type: pdflink Text: Availability: 0 |
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| Header | DbId: aci DbLabel: Applied Science & Technology Source An: 501605702 AccessLevel: 2 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=501605702 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1049/iet-cdt.2009.0009 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 11 StartPage: 159 Titles: – TitleFull: MetaWire: using FPGA configuration circuitry to emulate a network-on-chip. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Shelburne, M. – PersonEntity: Name: NameFull: Patterson, C. – PersonEntity: Name: NameFull: Athanas, P. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 05 Text: May 2010 Type: published Y: 2010 Identifiers: – Type: issn-print Value: 17518601 Numbering: – Type: volume Value: 4 – Type: issue Value: 3 Titles: – TitleFull: IET Computers & Digital Techniques Type: main |
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