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Multioperand Redundant Adders on FPGAs.

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Bibliographic Details
Title: Multioperand Redundant Adders on FPGAs.
Authors: Hormigo, Javier1, Villalba, Julio1, Zapata, Emilio L.1
Source: IEEE Transactions on Computers; Oct2013, Vol. 62 Issue 10, p2013-2025, 13p
Database: Applied Science & Technology Source
FullText Text:
  Availability: 0
Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 89975680
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
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  Data: Multioperand Redundant Adders on FPGAs.
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  Data: <searchLink fieldCode="AU" term="%22Hormigo%2C+Javier%22">Hormigo, Javier</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Villalba%2C+Julio%22">Villalba, Julio</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Zapata%2C+Emilio+L%2E%22">Zapata, Emilio L.</searchLink><relatesTo>1</relatesTo>
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  Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Computers%22">IEEE Transactions on Computers</searchLink>; Oct2013, Vol. 62 Issue 10, p2013-2025, 13p
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=89975680
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      – Type: doi
        Value: 10.1109/TC.2012.168
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      – Code: eng
        Text: English
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        PageCount: 13
        StartPage: 2013
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      – TitleFull: Multioperand Redundant Adders on FPGAs.
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            NameFull: Hormigo, Javier
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            NameFull: Villalba, Julio
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            NameFull: Zapata, Emilio L.
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              Text: Oct2013
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              Y: 2013
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