APA (7th ed.) Citation

Bareiša, E., Jusas, V., Motiejūnas, K., & Šeinauskas, R. (2013). Functional Delay Test Generation Approach Using a Software Prototype of the Circuit. Computer Science & Information Systems, 10(3), 1165. https://doi.org/10.2298/CSIS120416019B

Chicago Style (17th ed.) Citation

Bareiša, Eduardas, Vacius Jusas, Kęstutis Motiejūnas, and Rimantas Šeinauskas. "Functional Delay Test Generation Approach Using a Software Prototype of the Circuit." Computer Science & Information Systems 10, no. 3 (2013): 1165. https://doi.org/10.2298/CSIS120416019B.

MLA (9th ed.) Citation

Bareiša, Eduardas, et al. "Functional Delay Test Generation Approach Using a Software Prototype of the Circuit." Computer Science & Information Systems, vol. 10, no. 3, 2013, p. 1165, https://doi.org/10.2298/CSIS120416019B.