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FPGA implementation of approximate multiplier using static segmentation.

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Title: FPGA implementation of approximate multiplier using static segmentation.
Authors: Ponniah, Suveetha Dhanaselvam1 (AUTHOR) suveethaj@gmail.com, Balasubramanian, Karthikeyan1 (AUTHOR) bkk@vcet.ac.in, Kamatchi, Kavitha1 (AUTHOR) kkavi@vcet.ac.in, Karunanidi, Rathimeena1 (AUTHOR), Thenappan, Meenakshi1 (AUTHOR), Raja Kumar, Shri Swetha Raj1 (AUTHOR)
Source: AIP Conference Proceedings. 2026, Vol. 3341 Issue 1, p1-7. 7p.
Database: Academic Search Ultimate
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Header DbId: asn
DbLabel: Academic Search Ultimate
An: 192464813
AccessLevel: 2
PubType: Conference
PubTypeId: conference
PreciseRelevancyScore: 0
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        Value: 10.1063/5.0317414
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        Text: English
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        PageCount: 7
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      – TitleFull: FPGA implementation of approximate multiplier using static segmentation.
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            NameFull: Ponniah, Suveetha Dhanaselvam
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            NameFull: Balasubramanian, Karthikeyan
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            NameFull: Karunanidi, Rathimeena
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            NameFull: Thenappan, Meenakshi
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            NameFull: Raja Kumar, Shri Swetha Raj
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              Text: 2026
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              Y: 2026
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