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Energy Efficiency on Multi-Core Architectures with Multiple Voltage Islands.

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Title: Energy Efficiency on Multi-Core Architectures with Multiple Voltage Islands.
Authors: Pagani, Santiago1, Chen, Jian-Jia2, Li, Minming3
Source: IEEE Transactions on Parallel & Distributed Systems. Jun2015, Vol. 26 Issue 6, p1608-1621. 14p.
Subjects: Energy consumption, Multicore processors, Electric potential, Fifth generation computers, Heuristic algorithms, Dynamic programming
Abstract: Efficient and effective system-level power management for multi-core systems with multiple voltage islands is necessary for next-generation computing systems. This paper considers energy efficiency for such systems, in which the cores in the same voltage island have to be operated at the same supply voltage level. We explore how to map given task sets onto cores, so that each task set is assigned and executed on one core and the energy consumption is minimized. Due to the restriction to operate at the same supply voltage in a voltage island, different mappings will result in different energy consumptions. By using the simple single frequency approximation scheme (SFA) to decide the voltages and frequencies of individual voltage islands, this paper presents the approximation factor analysis (in terms of energy consumption) for simple heuristic algorithms, and develops a dynamic programming algorithm, which derives optimal mapping solutions for energy minimization when using SFA. We experimentally evaluate the running time and energy consumption performance of these algorithms on Intel’s single-chip cloud computer (SCC). Moreover, we conduct simulations for hypothetical platforms with different number of voltage islands and cores per island, also considering different task partitioning policies. [ABSTRACT FROM PUBLISHER]
Copyright of IEEE Transactions on Parallel & Distributed Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: Energy Efficiency on Multi-Core Architectures with Multiple Voltage Islands.
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  Data: <searchLink fieldCode="DE" term="%22Energy+consumption%22">Energy consumption</searchLink><br /><searchLink fieldCode="DE" term="%22Multicore+processors%22">Multicore processors</searchLink><br /><searchLink fieldCode="DE" term="%22Electric+potential%22">Electric potential</searchLink><br /><searchLink fieldCode="DE" term="%22Fifth+generation+computers%22">Fifth generation computers</searchLink><br /><searchLink fieldCode="DE" term="%22Heuristic+algorithms%22">Heuristic algorithms</searchLink><br /><searchLink fieldCode="DE" term="%22Dynamic+programming%22">Dynamic programming</searchLink>
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  Data: Efficient and effective system-level power management for multi-core systems with multiple voltage islands is necessary for next-generation computing systems. This paper considers energy efficiency for such systems, in which the cores in the same voltage island have to be operated at the same supply voltage level. We explore how to map given task sets onto cores, so that each task set is assigned and executed on one core and the energy consumption is minimized. Due to the restriction to operate at the same supply voltage in a voltage island, different mappings will result in different energy consumptions. By using the simple single frequency approximation scheme (SFA) to decide the voltages and frequencies of individual voltage islands, this paper presents the approximation factor analysis (in terms of energy consumption) for simple heuristic algorithms, and develops a dynamic programming algorithm, which derives optimal mapping solutions for energy minimization when using SFA. We experimentally evaluate the running time and energy consumption performance of these algorithms on Intel’s single-chip cloud computer (SCC). Moreover, we conduct simulations for hypothetical platforms with different number of voltage islands and cores per island, also considering different task partitioning policies. [ABSTRACT FROM PUBLISHER]
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  Label:
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  Data: <i>Copyright of IEEE Transactions on Parallel & Distributed Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1109/TPDS.2014.2323260
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        Text: English
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        PageCount: 14
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      – SubjectFull: Energy consumption
        Type: general
      – SubjectFull: Multicore processors
        Type: general
      – SubjectFull: Electric potential
        Type: general
      – SubjectFull: Fifth generation computers
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      – SubjectFull: Heuristic algorithms
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      – SubjectFull: Dynamic programming
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      – TitleFull: Energy Efficiency on Multi-Core Architectures with Multiple Voltage Islands.
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            NameFull: Chen, Jian-Jia
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              Text: Jun2015
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