A Multicycle Test Set Based on a Two-Cycle Test Set With Constant Primary Input Vectors.

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Title: A Multicycle Test Set Based on a Two-Cycle Test Set With Constant Primary Input Vectors.
Authors: Pomeranz, Irith1
Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Jul2015, Vol. 34 Issue 7, p1124-1132. 9p.
Subjects: Test generators, Finite state machines, Computer simulation, Sequential machine theory, Vectors (Calculus)
Abstract: Test compaction can be achieved by using multicycle tests. To avoid the computationally intensive process of sequential test generation, multicycle tests can be generated by extending two-cycle tests. However, the scan-in state of a two-cycle test is not always effective for a multicycle test when the primary input vectors are held constant during the functional clock cycles of a test. This paper studies the extent of this issue by considering exhaustive two-cycle and multicycle test sets with constant primary input vectors for finite-state machine benchmarks. Based on the results of this study, it describes an efficient test compaction procedure that modifies selected two-cycle tests in a given test set in order to make them more effective as a source for multicycle tests with constant primary input vectors. Experimental results are presented to demonstrate the importance of this step to test compaction. [ABSTRACT FROM PUBLISHER]
Copyright of IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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Items – Name: Title
  Label: Title
  Group: Ti
  Data: A Multicycle Test Set Based on a Two-Cycle Test Set With Constant Primary Input Vectors.
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Pomeranz%2C+Irith%22">Pomeranz, Irith</searchLink><relatesTo>1</relatesTo>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Computer-Aided+Design+of+Integrated+Circuits+%26+Systems%22">IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems</searchLink>. Jul2015, Vol. 34 Issue 7, p1124-1132. 9p.
– Name: Subject
  Label: Subjects
  Group: Su
  Data: <searchLink fieldCode="DE" term="%22Test+generators%22">Test generators</searchLink><br /><searchLink fieldCode="DE" term="%22Finite+state+machines%22">Finite state machines</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+simulation%22">Computer simulation</searchLink><br /><searchLink fieldCode="DE" term="%22Sequential+machine+theory%22">Sequential machine theory</searchLink><br /><searchLink fieldCode="DE" term="%22Vectors+%28Calculus%29%22">Vectors (Calculus)</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: Test compaction can be achieved by using multicycle tests. To avoid the computationally intensive process of sequential test generation, multicycle tests can be generated by extending two-cycle tests. However, the scan-in state of a two-cycle test is not always effective for a multicycle test when the primary input vectors are held constant during the functional clock cycles of a test. This paper studies the extent of this issue by considering exhaustive two-cycle and multicycle test sets with constant primary input vectors for finite-state machine benchmarks. Based on the results of this study, it describes an efficient test compaction procedure that modifies selected two-cycle tests in a given test set in order to make them more effective as a source for multicycle tests with constant primary input vectors. Experimental results are presented to demonstrate the importance of this step to test compaction. [ABSTRACT FROM PUBLISHER]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1109/TCAD.2015.2408257
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 9
        StartPage: 1124
    Subjects:
      – SubjectFull: Test generators
        Type: general
      – SubjectFull: Finite state machines
        Type: general
      – SubjectFull: Computer simulation
        Type: general
      – SubjectFull: Sequential machine theory
        Type: general
      – SubjectFull: Vectors (Calculus)
        Type: general
    Titles:
      – TitleFull: A Multicycle Test Set Based on a Two-Cycle Test Set With Constant Primary Input Vectors.
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Pomeranz, Irith
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 07
              Text: Jul2015
              Type: published
              Y: 2015
          Identifiers:
            – Type: issn-print
              Value: 02780070
          Numbering:
            – Type: volume
              Value: 34
            – Type: issue
              Value: 7
          Titles:
            – TitleFull: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
              Type: main
ResultId 1