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A Heterogeneous Von Neumann/Explicit Dataflow Processor.

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Title: A Heterogeneous Von Neumann/Explicit Dataflow Processor.
Authors: Nowatzki, Tony1, Gangadhar, Vinay1, Sankaralingam, Karthikeyan1
Source: IEEE Micro. 5/1/2016, Vol. 36 Issue 3, p20-30. 11p.
Subjects: Data flow computing, Microprocessors, Von Neumann architecture (Computers), Computer architecture, Electronic data processing
Abstract: Decades-old explicit dataflow architectures eliminate many of the overheads of general-purpose processors but have not been successful because of their lack of sufficient control speculation and the latency overhead of explicit communication. This article observes a synergy between out-of-order (OoO) and explicit dataflow processors, in which dynamically switching between them according to program phases can greatly improve performance and energy efficiency. [ABSTRACT FROM PUBLISHER]
Copyright of IEEE Micro is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
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DbLabel: Engineering Source
An: 116115879
AccessLevel: 6
PubType: Academic Journal
PubTypeId: academicJournal
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  Data: A Heterogeneous Von Neumann/Explicit Dataflow Processor.
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  Data: Decades-old explicit dataflow architectures eliminate many of the overheads of general-purpose processors but have not been successful because of their lack of sufficient control speculation and the latency overhead of explicit communication. This article observes a synergy between out-of-order (OoO) and explicit dataflow processors, in which dynamically switching between them according to program phases can greatly improve performance and energy efficiency. [ABSTRACT FROM PUBLISHER]
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  Data: <i>Copyright of IEEE Micro is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1109/MM.2016.34
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        Text: English
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      – SubjectFull: Von Neumann architecture (Computers)
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      – TitleFull: A Heterogeneous Von Neumann/Explicit Dataflow Processor.
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              Text: 5/1/2016
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