APA (7th ed.) Citation

Diniz, C., Fonseca, M., Costa, E., & Bampi, S. (2016). Evaluating the use of adder compressors for power-efficient HEVC interpolation filter architecture. Analog Integrated Circuits & Signal Processing, 89(1), 111. https://doi.org/10.1007/s10470-016-0765-6

Chicago Style (17th ed.) Citation

Diniz, Cláudio, Mateus Fonseca, Eduardo Costa, and Sergio Bampi. "Evaluating the Use of Adder Compressors for Power-efficient HEVC Interpolation Filter Architecture." Analog Integrated Circuits & Signal Processing 89, no. 1 (2016): 111. https://doi.org/10.1007/s10470-016-0765-6.

MLA (9th ed.) Citation

Diniz, Cláudio, et al. "Evaluating the Use of Adder Compressors for Power-efficient HEVC Interpolation Filter Architecture." Analog Integrated Circuits & Signal Processing, vol. 89, no. 1, 2016, p. 111, https://doi.org/10.1007/s10470-016-0765-6.