Microprocessor Testing: Functional Meets Structural Test.
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| Title: | Microprocessor Testing: Functional Meets Structural Test. |
|---|---|
| Authors: | Touati, A.1, Bosio, A.1, Girard, P.1, Virazel, A.1, Bernardi, P.2, Sonza Reorda, M.2 |
| Source: | Journal of Circuits, Systems & Computers. Aug2017, Vol. 26 Issue 8, p-1. 18p. |
| Subjects: | Microprocessor testing, Computer software testing, Fault tolerance (Engineering), Algorithms, Integrated circuits |
| Abstract: | Structural test is widely adopted to ensure high quality for a given product. The availability of many commercial tools and the use of fault models make it very easy to generate and to evaluate. Despite its efficiency, structural test is also known for the risk of over-testing that may lead to yield loss. This problem is mainly due to the fact that structural test does not take into account the functionality of the circuit under test. On the other hand, functional test guarantees that the circuit is tested under normal conditions, thus avoiding any over- as well as under-testing issues. More in particular, for microprocessor testing, functional test is usually applied by exploiting the Software-Based-Self-Test (SBST) technique. SBST applies a set of functional test programs that are executed by the processor to achieve a given fault coverage. SBST fits particularly well for online testing of processor-based systems. In this work, we describe a technique able to execute functional test programs as if they were structural tests. In this way, they can be applied during the end-of-production test in order to achieve good fault coverage and, at the same time, avoiding any over-test problems. We will show that it is possible to map functional test programs into the classical structural test schemes, so that their application simply requires the presence of a scan chain. Finally, we present a compaction algorithm able to significantly reduce the test length. Results carried out on two different microprocessors show the advantages of such approach. [ABSTRACT FROM AUTHOR] |
| Copyright of Journal of Circuits, Systems & Computers is the property of World Scientific Publishing Company and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 122401347 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Microprocessor Testing: Functional Meets Structural Test. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Touati%2C+A%2E%22">Touati, A.</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Bosio%2C+A%2E%22">Bosio, A.</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Girard%2C+P%2E%22">Girard, P.</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Virazel%2C+A%2E%22">Virazel, A.</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Bernardi%2C+P%2E%22">Bernardi, P.</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AR" term="%22Sonza+Reorda%2C+M%2E%22">Sonza Reorda, M.</searchLink><relatesTo>2</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Journal+of+Circuits%2C+Systems+%26+Computers%22">Journal of Circuits, Systems & Computers</searchLink>. Aug2017, Vol. 26 Issue 8, p-1. 18p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Microprocessor+testing%22">Microprocessor testing</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+software+testing%22">Computer software testing</searchLink><br /><searchLink fieldCode="DE" term="%22Fault+tolerance+%28Engineering%29%22">Fault tolerance (Engineering)</searchLink><br /><searchLink fieldCode="DE" term="%22Algorithms%22">Algorithms</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+circuits%22">Integrated circuits</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Structural test is widely adopted to ensure high quality for a given product. The availability of many commercial tools and the use of fault models make it very easy to generate and to evaluate. Despite its efficiency, structural test is also known for the risk of over-testing that may lead to yield loss. This problem is mainly due to the fact that structural test does not take into account the functionality of the circuit under test. On the other hand, functional test guarantees that the circuit is tested under normal conditions, thus avoiding any over- as well as under-testing issues. More in particular, for microprocessor testing, functional test is usually applied by exploiting the Software-Based-Self-Test (SBST) technique. SBST applies a set of functional test programs that are executed by the processor to achieve a given fault coverage. SBST fits particularly well for online testing of processor-based systems. In this work, we describe a technique able to execute functional test programs as if they were structural tests. In this way, they can be applied during the end-of-production test in order to achieve good fault coverage and, at the same time, avoiding any over-test problems. We will show that it is possible to map functional test programs into the classical structural test schemes, so that their application simply requires the presence of a scan chain. Finally, we present a compaction algorithm able to significantly reduce the test length. Results carried out on two different microprocessors show the advantages of such approach. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of Journal of Circuits, Systems & Computers is the property of World Scientific Publishing Company and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1142/S0218126617400072 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 18 StartPage: -1 Subjects: – SubjectFull: Microprocessor testing Type: general – SubjectFull: Computer software testing Type: general – SubjectFull: Fault tolerance (Engineering) Type: general – SubjectFull: Algorithms Type: general – SubjectFull: Integrated circuits Type: general Titles: – TitleFull: Microprocessor Testing: Functional Meets Structural Test. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Touati, A. – PersonEntity: Name: NameFull: Bosio, A. – PersonEntity: Name: NameFull: Girard, P. – PersonEntity: Name: NameFull: Virazel, A. – PersonEntity: Name: NameFull: Bernardi, P. – PersonEntity: Name: NameFull: Sonza Reorda, M. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 08 Text: Aug2017 Type: published Y: 2017 Identifiers: – Type: issn-print Value: 02181266 Numbering: – Type: volume Value: 26 – Type: issue Value: 8 Titles: – TitleFull: Journal of Circuits, Systems & Computers Type: main |
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