Automatically Accelerating Non-Numerical Programs by Architecture-Compiler Co-Design.
Saved in:
| Title: | Automatically Accelerating Non-Numerical Programs by Architecture-Compiler Co-Design. |
|---|---|
| Authors: | Campanoni, Simone1, Brownell, Kevin2, Kanev, Svilen2, Jones, Timothy M.3, Gu-Yeon Wei2, Brooks, David2 |
| Source: | Communications of the ACM. Dec2017, Vol. 60 Issue 12, p88-97. 10p. 4 Diagrams, 1 Chart, 3 Graphs. |
| Subjects: | Parallel computer software, Parallelizing compilers, Microprocessor design & construction, Multicore processors, Computer architecture |
| Abstract: | Because of the high cost of communication between processors, compilers that parallelize loops automatically have been forced to skip a large class of loops that are both critical to performance and rich in latent parallelism. HELIX-RC is a compiler/microprocessor co-design that opens those loops to parallelization by decoupling communication from thread execution in conventional multicore architecures. Simulations of HELIX-RC, applied to a processor with 16 Intel Atom-like cores, show an average of 6.85× performance speedup for six SPEC CINT2000 benchmarks. [ABSTRACT FROM AUTHOR] |
| Copyright of Communications of the ACM is the property of Association for Computing Machinery and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
Be the first to leave a comment!
