A tuning approach for iterative multiple 3d stencil pipeline on GPUs: Anisotropic Nonlinear Diffusion algorithm as case study.
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| Title: | A tuning approach for iterative multiple 3d stencil pipeline on GPUs: Anisotropic Nonlinear Diffusion algorithm as case study. |
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| Authors: | Tabik, S.1 siham@ugr.es, Peemen, M.2, Romero, L. F.3 |
| Source: | Journal of Supercomputing. Apr2018, Vol. 74 Issue 4, p1580-1608. 29p. |
| Subjects: | Graphics processing units, OpenCL (Computer program language), Distributed shared memory, Partial differential equations, NVIDIA Corp. |
| Abstract: | This paper focuses on challenging applications that can be expressed as an iterative pipeline of multiple 3d stencil stages and explores their optimization space on GPUs. For this study, we selected a representative example from the field of digital signal processing, the Anisotropic Nonlinear Diffusion algorithm. An open issue to these applications is to determine the optimal fission/fusion level of the involved stages and whether that combination benefits from data tiling. This implies exploring a large space of all the possible fission/fusion combinations with and without tiling, thus making the process non-trivial. This study provides insights to reduce the optimization tuning space and programming effort of iterative multiple 3d stencils. Our results demonstrate that all combinations that fuse the bottleneck stencil with high halos update cost (>25% |
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| Database: | Engineering Source |
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| Abstract: | This paper focuses on challenging applications that can be expressed as an iterative pipeline of multiple 3d stencil stages and explores their optimization space on GPUs. For this study, we selected a representative example from the field of digital signal processing, the Anisotropic Nonlinear Diffusion algorithm. An open issue to these applications is to determine the optimal fission/fusion level of the involved stages and whether that combination benefits from data tiling. This implies exploring a large space of all the possible fission/fusion combinations with and without tiling, thus making the process non-trivial. This study provides insights to reduce the optimization tuning space and programming effort of iterative multiple 3d stencils. Our results demonstrate that all combinations that fuse the bottleneck stencil with high halos update cost (>25%<inline-graphic></inline-graphic>, this percentage can be measured or estimated experimentally for each single stencil) and high registers and shared memory accesses must not be considered in the exploration process. The optimal fission/fusion combination is up to 1.65×<inline-graphic></inline-graphic> faster than the case in which we fully decompose our stencil without tiling and 5.3×<inline-graphic></inline-graphic> faster with respect to the fully fused version on the NVIDIA GPUs. [ABSTRACT FROM AUTHOR] |
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| ISSN: | 09208542 |
| DOI: | 10.1007/s11227-017-2184-6 |
