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System performance enhancement with thread suspension for simultaneous multi-threading processors.

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Title: System performance enhancement with thread suspension for simultaneous multi-threading processors.
Authors: Wang, Wenjun1 wenjun.wang@utsa.edu, Lin, Wei-Ming1
Source: International Journal of Computers & Applications. Nov2020, Vol. 42 Issue 8, p774-786. 13p.
Subjects: Threads (Computer programs), Parallel processing, Computer software, Parallel programming, Electronic data processing
Abstract: Simultaneous Multi-Threading systems improve performance by allowing multiple independent threads to be executed concurrently with shared key resources. Unfair sharing of resources among multiple threads can easily clog the pipeline stages by slower threads and hamper the normal processing of faster threads. In this paper, we propose a thread-suspension scheme combined with a uniform register file capping technique to avoid imbalanced distribution of resources. When a shared resource congestion occurs on the pipeline stages, the thread with the lowest resource utilization efficiency among all active threads will be suspended so as to provide other threads more space to proceed for a higher throughput. Our experimental results show that our proposed technique improves the average system throughput in terms of Instruction Per Clock Cycle by up to 51.3%, with little compromise in execution fairness. [ABSTRACT FROM AUTHOR]
Copyright of International Journal of Computers & Applications is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
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Header DbId: egs
DbLabel: Engineering Source
An: 146380059
AccessLevel: 6
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
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  Data: System performance enhancement with thread suspension for simultaneous multi-threading processors.
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  Data: <searchLink fieldCode="AR" term="%22Wang%2C+Wenjun%22">Wang, Wenjun</searchLink><relatesTo>1</relatesTo><i> wenjun.wang@utsa.edu</i><br /><searchLink fieldCode="AR" term="%22Lin%2C+Wei-Ming%22">Lin, Wei-Ming</searchLink><relatesTo>1</relatesTo>
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  Data: <searchLink fieldCode="JN" term="%22International+Journal+of+Computers+%26+Applications%22">International Journal of Computers & Applications</searchLink>. Nov2020, Vol. 42 Issue 8, p774-786. 13p.
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  Data: <searchLink fieldCode="DE" term="%22Threads+%28Computer+programs%29%22">Threads (Computer programs)</searchLink><br /><searchLink fieldCode="DE" term="%22Parallel+processing%22">Parallel processing</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+software%22">Computer software</searchLink><br /><searchLink fieldCode="DE" term="%22Parallel+programming%22">Parallel programming</searchLink><br /><searchLink fieldCode="DE" term="%22Electronic+data+processing%22">Electronic data processing</searchLink>
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  Data: Simultaneous Multi-Threading systems improve performance by allowing multiple independent threads to be executed concurrently with shared key resources. Unfair sharing of resources among multiple threads can easily clog the pipeline stages by slower threads and hamper the normal processing of faster threads. In this paper, we propose a thread-suspension scheme combined with a uniform register file capping technique to avoid imbalanced distribution of resources. When a shared resource congestion occurs on the pipeline stages, the thread with the lowest resource utilization efficiency among all active threads will be suspended so as to provide other threads more space to proceed for a higher throughput. Our experimental results show that our proposed technique improves the average system throughput in terms of Instruction Per Clock Cycle by up to 51.3%, with little compromise in execution fairness. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
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  Data: <i>Copyright of International Journal of Computers & Applications is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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      – Type: doi
        Value: 10.1080/1206212X.2018.1489572
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      – Code: eng
        Text: English
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        PageCount: 13
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    Subjects:
      – SubjectFull: Threads (Computer programs)
        Type: general
      – SubjectFull: Parallel processing
        Type: general
      – SubjectFull: Computer software
        Type: general
      – SubjectFull: Parallel programming
        Type: general
      – SubjectFull: Electronic data processing
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      – TitleFull: System performance enhancement with thread suspension for simultaneous multi-threading processors.
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            NameFull: Wang, Wenjun
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            NameFull: Lin, Wei-Ming
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              Text: Nov2020
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