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TFI-FTS: An efficient transient fault injection and faulttolerant system for asynchronous circuits on FPGA platform.

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Title: TFI-FTS: An efficient transient fault injection and faulttolerant system for asynchronous circuits on FPGA platform.
Authors: Y. N., Sharath Kumar1 sharathkumaryn@gmail.com, P., Dinesha2
Source: International Journal of Electrical & Computer Engineering (2088-8708). Jun2021, Vol. 11 Issue 3, p2705-2711. 7p.
Subjects: Asynchronous circuits, Very large scale circuit integration, Digital electronics, Threshold logic, Logic circuits
Abstract: Designing VLSI digital circuits is challenging tasks because of testing the circuits concerning design time. The reliability and productivity of digital integrated circuits are primarily affected by the defects in the manufacturing process or systems. If the defects are more in the systems, which leads the fault in the systems. The fault tolerant systems are necessary to overcome the faults in the VLSI digital circuits. In this research article, asynchronous circuits based on effective transient fault injection (TFI) and fault tolerant system (FTS) are modeled. The TFI system generates the faults based on BMA based LFSR with faulty logic insertion and one hot encoded register. The BMA based LFSR reduces the hardware complexity with less power consumption on-chip than standard LFSR method. The FTS uses triple mode redundancy (TMR) based majority voter logic (MVL) to tolerant the faults for asynchronous circuits. The benchmarked 74X-series circuits are considered as an asynchronous circuit for TMR logic. The TFI-FTS module is modeled using Verilog-HDL on Xilinx-ISE and synthesized on hardware platform. The Performance parameters are tabulated for TFI-FTS based asynchronous circuits. The performance of TFI-FTS module is analyzed with 100% fault coverage. The fault coverage is validated using functional simulation of each asynchronous circuit with fault injection in TFI-FTS module. [ABSTRACT FROM AUTHOR]
Copyright of International Journal of Electrical & Computer Engineering (2088-8708) is the property of Institute of Advanced Engineering & Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
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  Data: TFI-FTS: An efficient transient fault injection and faulttolerant system for asynchronous circuits on FPGA platform.
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  Data: <searchLink fieldCode="DE" term="%22Asynchronous+circuits%22">Asynchronous circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Very+large+scale+circuit+integration%22">Very large scale circuit integration</searchLink><br /><searchLink fieldCode="DE" term="%22Digital+electronics%22">Digital electronics</searchLink><br /><searchLink fieldCode="DE" term="%22Threshold+logic%22">Threshold logic</searchLink><br /><searchLink fieldCode="DE" term="%22Logic+circuits%22">Logic circuits</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: Designing VLSI digital circuits is challenging tasks because of testing the circuits concerning design time. The reliability and productivity of digital integrated circuits are primarily affected by the defects in the manufacturing process or systems. If the defects are more in the systems, which leads the fault in the systems. The fault tolerant systems are necessary to overcome the faults in the VLSI digital circuits. In this research article, asynchronous circuits based on effective transient fault injection (TFI) and fault tolerant system (FTS) are modeled. The TFI system generates the faults based on BMA based LFSR with faulty logic insertion and one hot encoded register. The BMA based LFSR reduces the hardware complexity with less power consumption on-chip than standard LFSR method. The FTS uses triple mode redundancy (TMR) based majority voter logic (MVL) to tolerant the faults for asynchronous circuits. The benchmarked 74X-series circuits are considered as an asynchronous circuit for TMR logic. The TFI-FTS module is modeled using Verilog-HDL on Xilinx-ISE and synthesized on hardware platform. The Performance parameters are tabulated for TFI-FTS based asynchronous circuits. The performance of TFI-FTS module is analyzed with 100% fault coverage. The fault coverage is validated using functional simulation of each asynchronous circuit with fault injection in TFI-FTS module. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of International Journal of Electrical & Computer Engineering (2088-8708) is the property of Institute of Advanced Engineering & Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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      – Type: doi
        Value: 10.11591/ijece.v11i3.pp2704-2710
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      – Code: eng
        Text: English
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      Pagination:
        PageCount: 7
        StartPage: 2705
    Subjects:
      – SubjectFull: Asynchronous circuits
        Type: general
      – SubjectFull: Very large scale circuit integration
        Type: general
      – SubjectFull: Digital electronics
        Type: general
      – SubjectFull: Threshold logic
        Type: general
      – SubjectFull: Logic circuits
        Type: general
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      – TitleFull: TFI-FTS: An efficient transient fault injection and faulttolerant system for asynchronous circuits on FPGA platform.
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            NameFull: Y. N., Sharath Kumar
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            NameFull: P., Dinesha
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            – D: 01
              M: 06
              Text: Jun2021
              Type: published
              Y: 2021
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              Value: 11
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            – TitleFull: International Journal of Electrical & Computer Engineering (2088-8708)
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