Measuring 3- and 4-Moduli Sets Delay Per Bit in Residue Number System: A Survey.
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| Title: | Measuring 3- and 4-Moduli Sets Delay Per Bit in Residue Number System: A Survey. |
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| Authors: | Torabi, Z.1 (AUTHOR) z.torabi@sru.ac.ir, Barzegaran, V.1 (AUTHOR) vidi@aut.ac.ir |
| Source: | IETE Journal of Research. Apr2024, Vol. 70 Issue 4, p3795-3803. 9p. |
| Subjects: | Computer arithmetic, Literature |
| Abstract: | Given the efficiency of the residue number system in high-speed and low-power applications, a wide variety of moduli sets have been introduced in the literature. Selecting an appropriate moduli set is one of the most important issues of using a residue number system. Moduli sets can be evaluated by several factors such as dynamic range, balanced channels, fast and low-power modular operations, and efficient reverse converter. In this paper, 3- and 4-moduli sets are separately reviewed and compared from a different perspective. Furthermore, the most efficient 3- and 4-moduli sets are suggested. A new parameter for average delay comparison is introduced, which shows the delay of every bit in the dynamic range providing a fair comparison of moduli sets with different numbers of moduli. Our comparison showed that either balanced channels or the delay of computations are essential factors for designing an efficient new moduli set. [ABSTRACT FROM AUTHOR] |
| Copyright of IETE Journal of Research is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
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| Header | DbId: egs DbLabel: Engineering Source An: 179220739 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Measuring 3- and 4-Moduli Sets Delay Per Bit in Residue Number System: A Survey. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Torabi%2C+Z%2E%22">Torabi, Z.</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> z.torabi@sru.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Barzegaran%2C+V%2E%22">Barzegaran, V.</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> vidi@aut.ac.ir</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IETE+Journal+of+Research%22">IETE Journal of Research</searchLink>. Apr2024, Vol. 70 Issue 4, p3795-3803. 9p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Computer+arithmetic%22">Computer arithmetic</searchLink><br /><searchLink fieldCode="DE" term="%22Literature%22">Literature</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Given the efficiency of the residue number system in high-speed and low-power applications, a wide variety of moduli sets have been introduced in the literature. Selecting an appropriate moduli set is one of the most important issues of using a residue number system. Moduli sets can be evaluated by several factors such as dynamic range, balanced channels, fast and low-power modular operations, and efficient reverse converter. In this paper, 3- and 4-moduli sets are separately reviewed and compared from a different perspective. Furthermore, the most efficient 3- and 4-moduli sets are suggested. A new parameter for average delay comparison is introduced, which shows the delay of every bit in the dynamic range providing a fair comparison of moduli sets with different numbers of moduli. Our comparison showed that either balanced channels or the delay of computations are essential factors for designing an efficient new moduli set. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IETE Journal of Research is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=179220739 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1080/03772063.2023.2204854 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 9 StartPage: 3795 Subjects: – SubjectFull: Computer arithmetic Type: general – SubjectFull: Literature Type: general Titles: – TitleFull: Measuring 3- and 4-Moduli Sets Delay Per Bit in Residue Number System: A Survey. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Torabi, Z. – PersonEntity: Name: NameFull: Barzegaran, V. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 04 Text: Apr2024 Type: published Y: 2024 Identifiers: – Type: issn-print Value: 03772063 Numbering: – Type: volume Value: 70 – Type: issue Value: 4 Titles: – TitleFull: IETE Journal of Research Type: main |
| ResultId | 1 |
