APA (7th ed.) Citation

Asadpour, A., Sabbagh, A., & Emrani, A. (2024). A hybrid forward/reverse converter in reversible logic to reduce hardware complexity of residual number system. Majlesi Journal of Electrical Engineering, 18(2), 1. https://doi.org/10.57647/j.mjee.2024.1802.29

Chicago Style (17th ed.) Citation

Asadpour, Ailin, Amir Sabbagh, and Azadeh Emrani. "A Hybrid Forward/reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System." Majlesi Journal of Electrical Engineering 18, no. 2 (2024): 1. https://doi.org/10.57647/j.mjee.2024.1802.29.

MLA (9th ed.) Citation

Asadpour, Ailin, et al. "A Hybrid Forward/reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System." Majlesi Journal of Electrical Engineering, vol. 18, no. 2, 2024, p. 1, https://doi.org/10.57647/j.mjee.2024.1802.29.