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A hybrid forward/reverse converter in reversible logic to reduce hardware complexity of residual number system.

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Title: A hybrid forward/reverse converter in reversible logic to reduce hardware complexity of residual number system.
Authors: Asadpour, Ailin1, Sabbagh, Amir1 sabbagh@iauk.ac.ir, Emrani, Azadeh2
Source: Majlesi Journal of Electrical Engineering. Jun2024, Vol. 18 Issue 2, p1-15. 15p.
Subjects: Computer arithmetic, Computer circuits, Reversible computing, Technological innovations, Number systems
Abstract: As an emerging technology, reversible computing enables the development of high-performance computing systems with low energy consumption. A residual number system (RNS) that performs arithmetic operations in parallel with error tolerance and no carry propagation requires forward and reverse converters to communicate with other digital circuits. Designing reversible forward and reverse converters using new technologies is very important due to their wide applications in implementing the RNS. These converters, which are the overhead of the system, increase energy consumption. This study proposes a hybrid converter conforming to reversible logic for the RNS. This hybrid converter unifies forward and reverse converters by sharing hardware and reversible gates. By using the mixed-radix conversion (MRC), the reverse conversion arithmetic relations adopt a similar format to that of the forward conversion arithmetic relations, and by adding a number of Fredkin gates and modifying the inputs, the reverse converter hardware is used to perform forward conversion. Based on the findings, the hybrid converter, which conformed to reversible logic for the moduli set {22n, 2n −1, 2n+1 −1} and {2n −1, 2n +1, 22n +1}, decreased the quantum cost to 19.56% and 19.52%, respectively. [ABSTRACT FROM AUTHOR]
Copyright of Majlesi Journal of Electrical Engineering is the property of OICC Press and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Availability: 0
Header DbId: egs
DbLabel: Engineering Source
An: 181393388
AccessLevel: 6
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PubTypeId: academicJournal
PreciseRelevancyScore: 0
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Items – Name: Title
  Label: Title
  Group: Ti
  Data: A hybrid forward/reverse converter in reversible logic to reduce hardware complexity of residual number system.
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Asadpour%2C+Ailin%22">Asadpour, Ailin</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Sabbagh%2C+Amir%22">Sabbagh, Amir</searchLink><relatesTo>1</relatesTo><i> sabbagh@iauk.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Emrani%2C+Azadeh%22">Emrani, Azadeh</searchLink><relatesTo>2</relatesTo>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22Majlesi+Journal+of+Electrical+Engineering%22">Majlesi Journal of Electrical Engineering</searchLink>. Jun2024, Vol. 18 Issue 2, p1-15. 15p.
– Name: Subject
  Label: Subjects
  Group: Su
  Data: <searchLink fieldCode="DE" term="%22Computer+arithmetic%22">Computer arithmetic</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+circuits%22">Computer circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Reversible+computing%22">Reversible computing</searchLink><br /><searchLink fieldCode="DE" term="%22Technological+innovations%22">Technological innovations</searchLink><br /><searchLink fieldCode="DE" term="%22Number+systems%22">Number systems</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: As an emerging technology, reversible computing enables the development of high-performance computing systems with low energy consumption. A residual number system (RNS) that performs arithmetic operations in parallel with error tolerance and no carry propagation requires forward and reverse converters to communicate with other digital circuits. Designing reversible forward and reverse converters using new technologies is very important due to their wide applications in implementing the RNS. These converters, which are the overhead of the system, increase energy consumption. This study proposes a hybrid converter conforming to reversible logic for the RNS. This hybrid converter unifies forward and reverse converters by sharing hardware and reversible gates. By using the mixed-radix conversion (MRC), the reverse conversion arithmetic relations adopt a similar format to that of the forward conversion arithmetic relations, and by adding a number of Fredkin gates and modifying the inputs, the reverse converter hardware is used to perform forward conversion. Based on the findings, the hybrid converter, which conformed to reversible logic for the moduli set {22n, 2n −1, 2n+1 −1} and {2n −1, 2n +1, 22n +1}, decreased the quantum cost to 19.56% and 19.52%, respectively. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of Majlesi Journal of Electrical Engineering is the property of OICC Press and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.57647/j.mjee.2024.1802.29
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 15
        StartPage: 1
    Subjects:
      – SubjectFull: Computer arithmetic
        Type: general
      – SubjectFull: Computer circuits
        Type: general
      – SubjectFull: Reversible computing
        Type: general
      – SubjectFull: Technological innovations
        Type: general
      – SubjectFull: Number systems
        Type: general
    Titles:
      – TitleFull: A hybrid forward/reverse converter in reversible logic to reduce hardware complexity of residual number system.
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Asadpour, Ailin
      – PersonEntity:
          Name:
            NameFull: Sabbagh, Amir
      – PersonEntity:
          Name:
            NameFull: Emrani, Azadeh
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 06
              Text: Jun2024
              Type: published
              Y: 2024
          Identifiers:
            – Type: issn-print
              Value: 2345377X
          Numbering:
            – Type: volume
              Value: 18
            – Type: issue
              Value: 2
          Titles:
            – TitleFull: Majlesi Journal of Electrical Engineering
              Type: main
ResultId 1