A hardware-efficient on-implant spike compression processor based on VQ-DAE for brain-implantable microsystems.

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Title: A hardware-efficient on-implant spike compression processor based on VQ-DAE for brain-implantable microsystems.
Authors: Ahmadi-Dastgerdi, Nazanin1 (AUTHOR), Hosseini-Nejad, Hossein1 (AUTHOR) hosseini_nezhad@kntu.ac.ir, Alinejad-Rokny, Hamid2 (AUTHOR)
Source: Medical & Biological Engineering & Computing. Jul2025, Vol. 63 Issue 7, p2047-2056. 10p.
Subjects: Vector quantization, Data compression, Mechanical efficiency, Complementary metal oxide semiconductors, Neurophysiologic monitoring, Neural computers, Brain-computer interfaces
Abstract: High-density implantable neural recording microsystems deal with a huge amount of data. Since the wireless transmission of the raw recorded data leads to excessive bandwidth requirements, spike compression approaches have become vital to such systems. The compression processor is designed to be implemented on the implant and so to avoid any tissue damage, the hardware cost of the processor is of great importance. The vector quantization (VQ) algorithm has proven to be effective in compression applications and spike compression systems as well. In this paper, benefiting from the capabilities of the denoising autoencoders (DAE), we propose a solution to enhance the compression performance of the VQ-based approach in terms of both reconstruction accuracy and hardware efficiency. Moreover, we develop a hardware-efficient multi-channel architecture for the proposed VQ-DAE processor. The processor has been implemented in a 180-nm CMOS technology and the validation and verification processes confirm that it provides satisfactory results. It achieves an average signal-to-noise-distortion (SNDR) of 14.51 at a spike compression ratio (SCR) of 30. Operated at a clock frequency of 192 kHz and a supply voltage of 1.8 V, the circuit consumes a power of 4.88 μ W and a silicon area of 0.14 mm2 per channel. [ABSTRACT FROM AUTHOR]
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  Data: A hardware-efficient on-implant spike compression processor based on VQ-DAE for brain-implantable microsystems.
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  Data: <searchLink fieldCode="JN" term="%22Medical+%26+Biological+Engineering+%26+Computing%22">Medical & Biological Engineering & Computing</searchLink>. Jul2025, Vol. 63 Issue 7, p2047-2056. 10p.
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  Data: <searchLink fieldCode="DE" term="%22Vector+quantization%22">Vector quantization</searchLink><br /><searchLink fieldCode="DE" term="%22Data+compression%22">Data compression</searchLink><br /><searchLink fieldCode="DE" term="%22Mechanical+efficiency%22">Mechanical efficiency</searchLink><br /><searchLink fieldCode="DE" term="%22Complementary+metal+oxide+semiconductors%22">Complementary metal oxide semiconductors</searchLink><br /><searchLink fieldCode="DE" term="%22Neurophysiologic+monitoring%22">Neurophysiologic monitoring</searchLink><br /><searchLink fieldCode="DE" term="%22Neural+computers%22">Neural computers</searchLink><br /><searchLink fieldCode="DE" term="%22Brain-computer+interfaces%22">Brain-computer interfaces</searchLink>
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  Data: High-density implantable neural recording microsystems deal with a huge amount of data. Since the wireless transmission of the raw recorded data leads to excessive bandwidth requirements, spike compression approaches have become vital to such systems. The compression processor is designed to be implemented on the implant and so to avoid any tissue damage, the hardware cost of the processor is of great importance. The vector quantization (VQ) algorithm has proven to be effective in compression applications and spike compression systems as well. In this paper, benefiting from the capabilities of the denoising autoencoders (DAE), we propose a solution to enhance the compression performance of the VQ-based approach in terms of both reconstruction accuracy and hardware efficiency. Moreover, we develop a hardware-efficient multi-channel architecture for the proposed VQ-DAE processor. The processor has been implemented in a 180-nm CMOS technology and the validation and verification processes confirm that it provides satisfactory results. It achieves an average signal-to-noise-distortion (SNDR) of 14.51 at a spike compression ratio (SCR) of 30. Operated at a clock frequency of 192 kHz and a supply voltage of 1.8 V, the circuit consumes a power of 4.88 μ W and a silicon area of 0.14 mm2 per channel. [ABSTRACT FROM AUTHOR]
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  Data: <i>Copyright of Medical & Biological Engineering & Computing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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      – SubjectFull: Data compression
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      – SubjectFull: Mechanical efficiency
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      – SubjectFull: Complementary metal oxide semiconductors
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      – SubjectFull: Neurophysiologic monitoring
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      – SubjectFull: Neural computers
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      – SubjectFull: Brain-computer interfaces
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      – TitleFull: A hardware-efficient on-implant spike compression processor based on VQ-DAE for brain-implantable microsystems.
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              M: 07
              Text: Jul2025
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              Y: 2025
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