Optimized Fredkin Gate and its Application to Design an Ancilla-Delay-Cost Efficient (2i∗j) Reversible RAM.
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| Title: | Optimized Fredkin Gate and its Application to Design an Ancilla-Delay-Cost Efficient (2i∗j) Reversible RAM. |
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| Authors: | Chowdhury, Barnali1 (AUTHOR) barnali92.cse@gmail.com, Awasthi, Shashank2 (AUTHOR) shashank.1801@gmail.com, Metya, Sanjeev Kumar1 (AUTHOR) smetya@gmail.com |
| Source: | Circuits, Systems & Signal Processing. Jan2026, Vol. 45 Issue 1, p364-392. 29p. |
| Subjects: | Reversible computing, Random access memory, Quantum gates, Quantum computing, Nanotechnology, Computational complexity |
| Abstract: | Reversible Computing can boost computational energy efficiency beyond the Landauer limit (kTln2) for irreversible bit operations. It holds great potential for future technologies like ultra-low power ICs, quantum-dot cellular automata (QCA), Quantum Computing, and Nanotechnology. So, there is an ongoing pursuit of efficient reversible circuits by optimizing quantum cost, constant inputs (ancilla), garbage outputs and delay, which heavily depends on the assumptions of underlying technology. In this work, we have proposed an optimized version of Fredkin Gate, one of the extensively used reversible gates for realization of almost all basic operations. We have also displayed some efficient designs of all the latches and flip-flops along with their master slave configurations having optimum performance metrics. The suggested D-FF, being the fundamental block of memory is used to explore the realization of a Reversible Random Access Memory (RRAM) along with a few new arrangements of its constituents like D Flip Flop (D-FF) based write authorized master–slave configuration and reversible decoder. The analysis depicting the comparison states that the new design of RRAM has outsmarted the existing works in terms of performance variables including hardware complexity. [ABSTRACT FROM AUTHOR] |
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| Database: | Engineering Source |
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